A semiconductor package includes a die pad, a semiconductor die mounted on the die pad, rows of terminal leads disposed around the die pad; a surface mount device (SMD) mounted and bonded with a bond wire in the semiconductor package; and a molding compound encapsulating the semiconductor die and the SMD, the bond wire, and at least partially encapsulating the die pad and the terminal leads. The SMD may be mounted in the semiconductor package by using a non-conductive paste or a conductive paste. The die pad, the tie bars and the terminal leads are coplanar.

This transformer chip includes an element insulating layer and a high-voltage coil and a low-voltage coil embedded in the element insulating layer. The high-voltage coil includes a first end face facing the low-voltage coil side in the z-direction, a second end face opposite the first end face, and a first side face. The element insulating layer includes a third insulating layer, a second insulating layer laminated on the third insulating layer and having a higher relative dielectric constant than the third insulating layer, and a first insulating layer laminated on the second insulating layer and having a lower relative dielectric constant than the second insulating layer. The high-voltage coil is provided within the first insulating layer with the first end face in contact with the second insulating layer.

A package comprising a substrate, a first antenna device, and an integrated device. The substrate comprising a first surface and a second surface, where the substrate comprises a plurality of interconnects. The first antenna device is coupled to the first surface of the substrate, through a first plurality of solder interconnects. The integrated device is coupled to the second surface of the substrate. The package may include an encapsulation layer located over the second surface of the substrate, where the encapsulation layer encapsulates the integrated device. The package may include a shield formed over a surface of the encapsulation layer, where the shield includes an electromagnetic interference (EMI) shield.

A package comprising a substrate comprising a first surface and a second surface, wherein the substrate comprises a plurality of interconnects; a first antenna device coupled to the first surface of the substrate, through a first plurality of solder interconnects, wherein a portion of the first antenna device overhangs over the substrate such that a portion of the first antenna device does not vertically overlap with any portion of the substrate; a second antenna device coupled to the first surface of the substrate, through a second plurality of solder interconnects; an integrated device coupled to the second surface of the substrate; an encapsulation layer coupled to the second surface of the substrate, wherein a vertical surface of the encapsulation layer is coplanar with a vertical surface of the substrate, and wherein the encapsulation layer at least partially encapsulates the integrated device; and a shield coupled to a surface of the encapsulation layer.

Various aspects of the present disclosure generally relate to wireless communication, and to a pillar that includes one or more structures configured to define a capacitor. For example, a device includes a die, a substrate, and a pillar having an embedded capacitor. The pillar is electrically connected to one or more conductors of the die and to one or more conductors of the substrate. The pillar includes a first conductive structure and a second conductive structure. The pillar also includes a dielectric layer disposed between the first conductive structure and the second conductive structure to define the embedded capacitor.