H01L2924/20103

Underfill material and method for manufacturing semiconductor device using the same
09691677 · 2017-06-27 · ·

An underfill material enabling voidless packaging and excellent solder bonding properties, and a method for manufacturing a semiconductor device using the same are provided. An underfill material, including an epoxy resin, an acid anhydride, an acrylic resin, and an organic peroxide, the minimum melt viscosity being between 1000 Pa*s and 2000 Pa*s, and gradient of melt viscosity between 10 C. higher than the minimum melt viscosity attainment temperature and a temperature 10 C. higher being between 900 Pa*s/ C. and 3100 Pa*s/ C., is applied to a semiconductor chip having a solder-tipped electrode formed thereon, and the semiconductor chip is mounted onto a circuit substrate having a counter electrode opposing the solder-tipped electrode, and the semiconductor chip and the circuit substrate are thermocompressed under bonding conditions of raising the temperature from a first temperature to a second temperature at a predetermined rate.

SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS
20170179072 · 2017-06-22 ·

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

Integrated electronic device including an interposer structure and a method for fabricating the same
09673172 · 2017-06-06 · ·

An integrated circuit device and a method of fabricating the same are presented. The integrated circuit device (1) includes two or more active components (30a, 30b), possibly fabricated by different semiconductor technologies, and an interposer structure (10) adapted for carrying the two or more active components such that at least one of the active components is carried on a top surface of the interposer structure. The integrated circuit device also includes at least one metal cap (40), furnished on the top surface of the interposer structure and encapsulating at least one of the active components. Some variants of the integrated circuit device of the invention are suited for operation under extreme conditions.

Underfill material and method for manufacturing semiconductor device using the same
09653371 · 2017-05-16 · ·

An underfill material enabling voidless packaging and excellent solder bonding properties, and a method for manufacturing a semiconductor device using the same are provided. An underfill material is used which contains an epoxy resin and a curing agent, and a time for a reaction rate to reach 20% at 240 C. calculated by Ozawa method using a differential scanning calorimeter is 2.0 sec or less and a time for the reaction rate to reach 60% is 3.0 sec or more. This enables voidless packaging and excellent solder connection properties.

ELECTRONIC DEVICE, ELECTRONIC PART, AND SOLDER
20170125366 · 2017-05-04 · ·

An electronic device includes a first electronic part, a second electronic part opposite the first electronic part, and a bonding portion between the first electronic part and the second electronic part. The bonding portion contains a solder containing a substance whose crystal structure reversibly changes in temperature rise and fall processes which accompany the operation of the electronic device or electronic equipment including the electronic device. A change in the crystal structure of the substance contained in the solder promotes recovery and recrystallization of the solder in the temperature rise and fall processes which accompany the operation of the electronic device or the electronic equipment. As a result, the coarsening of crystal grains in the solder is suppressed.

Systems and methods for bonding semiconductor elements

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element, wherein the surfaces of each of the plurality of first conductive structures and the plurality of second conductive structures include aluminum; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures.

Integrated circuit module having a first die with a power amplifier stacked with a second die and method of making the same

Disclosed is an integrated circuit module that includes a first die having a plurality of hot regions and at least one cool region when operating under normal conditions. The first die with a top surface includes at least one power amplifier that resides in the plurality of hot regions. The integrated circuit module also includes a second die. The second die has a bottom surface, which is adhered to the top surface of the first die, wherein any portion of the bottom surface of the second die that is adhered to the top surface of the first die resides exclusively on the at least one cool region. In at least one embodiment, the first die is an RF power amplifier die and the second die is a controller die having control circuitry configured to control the at least one power amplifier that is an RF power amplifier type.

Low Pressure Sintering Powder

A sintering powder comprising: a first type of metal particles having a mean longest dimension of from 100 nm to 50 m.

BONDING STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
20170033075 · 2017-02-02 ·

A method of manufacturing a bonding structure includes (a) providing a substrate, wherein the substrate includes a top surface and at least one bonding pad disposed adjacent to the top surface of the substrate, at least one bonding pad having a sloped surface with a first slope; (b) providing a semiconductor element, wherein the semiconductor element includes at least one pillar, and at least one pillar has a sidewall with a second slope, wherein the absolute value of the first slope is smaller than the absolute value of the second slope; and (c) bonding at least one pillar to a portion of the sloped surface of corresponding ones of the at least one bonding pad.

Method of manufacturing semiconductor package and semiconductor package

In a semiconductor package, surfaces of a die pad, a semiconductor element, a connecting member, and a lead are subjected to a surface treatment with a silane coupling agent. A first surface of a plurality of surfaces of the semiconductor device includes a first region where an organic substance is exposed, and a second region where an inorganic substance is exposed, the first surface being bonded with the connecting member. A bonding strength between the first region and the sealing resin is weaker than a bonding strength between the second region and the sealing resin.