Patent classifications
H01L2924/20104
FLIP CHIP BONDING METHOD
A flip chip bonding method includes obtaining a die including a first substrate and an adhesive layer on the first substrate; bonding the die to a second substrate different from the first substrate; and curing the adhesive layer. The curing the adhesive layer includes heating the second substrate to melt the adhesive layer, and providing the adhesive layer and the second substrate with air having pressure greater than atmospheric pressure.
METHOD OF MANUFACTURING A REDISTRIBUTION LAYER, REDISTRIBUTION LAYER AND INTEGRATED CIRCUIT INCLUDING THE REDISTRIBUTION LAYER
A method of manufacturing a redistribution layer includes: forming an insulating layer on a wafer, delimited by a top surface and a bottom surface in contact with the wafer; forming a conductive body above the top surface of the insulating layer; forming a first coating region extending around and above the conductive body, in contact with the conductive body, and in contact with the top surface of the insulating layer in correspondence of a bottom surface of the first coating region; applying a thermal treatment to the wafer in order to modify a residual stress of the first coating region, forming a gap between the bottom surface of the first coating region and the top surface of the insulating layer; forming, after applying the thermal treatment, a second coating region extending around and above the first coating region, filling said gap and completely sealing the first coating region.
Non-porous copper to copper interconnect
A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver. There is also a method for joining two semiconductor substrates.
SUBSTRATE BONDING METHOD
A substrate bonding method includes: providing a first and a second substrate; forming, on the first substrate, a first metal micro-bump array including first metal pillar(s) formed on the first substrate and first metal nanowires formed thereon and spaced apart from each other; forming, on the second substrate, a second metal micro-bump array including second metal pillar(s) formed on the second substrate and second metal nanowires formed thereon and spaced apart from each other; pressing the first substrate onto the second substrate, such that the first and second metal micro-bump arrays are positioned and staggered with each other, forming a physically interwoven interlocking structure between the first and second metal nanowires; applying a filling material between the first and second substrates; curing the filling material to form a bonding cavity; and then performing confined heating reflux on the first and second metal micro-bump arrays in the bonding cavity.
Low warpage curing methodology by inducing curvature
Embodiments of methods and apparatus for reducing warpage of a substrate are provided herein. In some embodiments, a method for reducing warpage of a substrate includes: applying an epoxy mold over a plurality of dies on the substrate in a dispenser tool; placing the substrate on a pedestal in a curing chamber, wherein the substrate has an expected post-cure deflection in a first direction; inducing a curvature on the substrate in a direction opposite the first direction; and curing the substrate by heating the substrate in the curing chamber.
SOLDER REFLOW APPARATUS AND METHOD OF MANUFACTURING AN ELECTRONIC DEVICE
A solder reflow apparatus includes a vapor generating chamber configured to accommodate a heat transfer fluid and to accommodate saturated vapor generated by heating the heat transfer fluid; a heater configured to heat the heat transfer fluid accommodated in the vapor generating chamber; a substrate stage configured to be movable upward and downward within the vapor generating chamber, the substrate stage including a seating surface; vapor passages penetrating the substrate stage and configured to allow the vapor to move therethrough; and suction passages penetrating the substrate stage to be open to the seating surface and in which at least a partial vacuum is generated.
Conductive particle, and connection material, connection structure, and connecting method of circuit member
There is provided a conductive particle including a core particle containing a resin material, and a surface layer that covers a surface of the core particle and contains a solder material, in which a melting point of the solder material is equal to or lower than a softening point of the resin material.
METHOD OF DETERMINING CURING CONDITIONS, METHOD OF PRODUCING CIRCUIT DEVICE AND CIRCUIT DEVICE
A method of determining curing conditions is for determining the curing conditions of a thermosetting resin to seal a conductive part between a substrate and an electronic component. A curing degree curve is created. The curing degree curve indicates, with respect to each of heating temperatures, relationship between heating time and curing degree of the thermosetting resin. On the basis of the created curing degree curve, a void removal time of a void naturally moving upward in the thermosetting resin, at a first heating temperature, is calculated. The first heating temperature is one of the heating temperatures.
SEMICONDUCTOR DEVICE
A semiconductor device includes: a base material having a first terminal; a semiconductor chip having a first electrode pad electrically connected with the first terminal, a second electrode pad to which a power supply potential is to be supplied, and a third electrode pad to which a reference potential is to be supplied, and mounted on the base material via a first member; a chip capacitor having a first electrode and a second electrode, and mounted on the semiconductor chip via a second member; a first wire electrically connecting the first electrode pad with the first terminal; a second wire electrically connecting the second electrode pad with the first electrode without going through the base material; and a third wire electrically connecting the third electrode pad with the second electrode without going through the base material.
PACKAGE STRUCTURE AND METHOD FOR CONNECTING COMPONENTS
A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.