A description is given of a power semiconductor module 10 which can be transferred from a normal operating mode to an explosion-free robust short-circuit failure mode. Said power semiconductor module 10 comprises a power semiconductor 1 having metallizations 3 which form potential areas and are separated by insulations and passivations on the top side 2 of said power semiconductor. Furthermore, an electrically conductive connecting layer is provided, on which at least one metal shaped body 4 which has a low lateral electrical resistance and is significantly thicker than the connecting layer is arranged, said at least one metal shaped body being applied by sintering of the connecting layer such that said metal shaped body is cohesively connected to the respective potential area. The metal shaped body 4 is embodied and designed with means for laterally homogenizing a current flowing through it in such a way that a lateral current flow component 5 is maintained until this module switches off in order to avoid an explosion, wherein the metal shaped body 4 has connections 6 having high-current capability. A transition from the operating mode to the robust failure mode then takes place in an explosion-free manner by virtue of the fact that the connections 6 are contact-connected and dimensioned in such a way that in the case of overload currents of greater than a multiple of the rated current of the power semiconductor 1, the operating mode changes to the short-circuit failure mode with connections 6 remaining on the metal shaped body 4 in an explosion-free manner without the formation of arcs.

An object of the invention is to manufacture a semiconductor module small. A metal wire (212) connecting a control electrode (101) and a control terminal (21) rises to form a first angle (θ1) from the control electrode (101) toward a first conductive portion (202), gradually goes in substantially parallel to the first conductive portion (202) as the metal wire approaches the first conductive portion (202), and is connected to the control terminal (21) to form a second angle (θ2) smaller than the first angle (θ1).

An object of the invention is to manufacture a semiconductor module small. A metal wire (212) connecting a control electrode (101) and a control terminal (21) rises to form a first angle (θ1) from the control electrode (101) toward a first conductive portion (202), gradually goes in substantially parallel to the first conductive portion (202) as the metal wire approaches the first conductive portion (202), and is connected to the control terminal (21) to form a second angle (θ2) smaller than the first angle (θ1).

In a semiconductor device, a first skirt portion molded from a first mold resin and a second skirt portion molded from a second mold resin are provided on a heat dissipating surface of a lead frame. Also, a thinly-molded portion is molded integrally with the second skirt portion from the second mold resin. According to this kind of configuration, adhesion between the thinly-molded portion and lead frame is high, and the semiconductor device with excellent heat dissipation and insulation is obtained.

In a semiconductor device, a first skirt portion molded from a first mold resin and a second skirt portion molded from a second mold resin are provided on a heat dissipating surface of a lead frame. Also, a thinly-molded portion is molded integrally with the second skirt portion from the second mold resin. According to this kind of configuration, adhesion between the thinly-molded portion and lead frame is high, and the semiconductor device with excellent heat dissipation and insulation is obtained.

A floating die package including a cavity formed through sublimation of a sacrificial die encapsulant and sublimation or separation of die attach materials after molding assembly. A pinhole vent in the molding structure is provided as a sublimation path to allow gases to escape, whereby the die or die stack is released from the substrate and suspended in the cavity by the bond wires only.

A floating die package including a cavity formed through sublimation of a sacrificial die encapsulant and sublimation or separation of die attach materials after molding assembly. A pinhole vent in the molding structure is provided as a sublimation path to allow gases to escape, whereby the die or die stack is released from the substrate and suspended in the cavity by the bond wires only.

A packaging structure is provided, including a substrate, a first chip, a second chip, and a conductive unit. The substrate includes a metal carrier, a patterned insulation layer disposed on the metal carrier and partially covering the metal carrier, and a patterned conductive layer disposed on the patterned insulation layer. The first chip is disposed on the metal carrier not covered by the patterned insulation layer. The second chip is disposed on the patterned conductive layer and electrically connected to the first chip by the conductive unit.

A packaging structure is provided, including a substrate, a first chip, a second chip, and a conductive unit. The substrate includes a metal carrier, a patterned insulation layer disposed on the metal carrier and partially covering the metal carrier, and a patterned conductive layer disposed on the patterned insulation layer. The first chip is disposed on the metal carrier not covered by the patterned insulation layer. The second chip is disposed on the patterned conductive layer and electrically connected to the first chip by the conductive unit.

A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and the source lead and the gate lead, with a gate electrode pad arranged at a position from the gate lead and the source lead farther than a source electrode pad.