There is provided a copper bonding wire that exhibits a favorable bondability even when a scrub at the time of bonding is reduced. The copper bonding wire is characterized in that when a sum of percentages of Cu, Cu.sub.2O, CuO and Cu(OH).sub.2 on a surface of the wire as measured by X-ray Photoelectron Spectroscopy (XPS) is defined as 100%, Cu[II]/Cu[I] which is a ratio of a total percentage of CuO and Cu(OH).sub.2 (Cu[II]) corresponding to bivalent Cu to a percentage of Cu.sub.2O (Cu[I]) corresponding to monovalent Cu falls within a range from 0.8 to 12.

A semiconductor device includes a substrate, a semiconductor element, a connection pad, a plated layer, a wire, and an encapsulation resin. The substrate includes a main surface. The semiconductor element is mounted on the main surface and includes a main surface electrode. The connection pad is formed of Cu, arranged with respect to the substrate, separated from the substrate, and includes a connection surface. The plated layer is formed of Ni and partially covers the connection surface. The wire is formed of Al and bonded to the main surface electrode and the plated layer. The encapsulation resin encapsulates the semiconductor element, the connection pad, the plated layer, and the wire.

A semiconductor device includes a substrate, a semiconductor element, a connection pad, a plated layer, a wire, and an encapsulation resin. The substrate includes a main surface. The semiconductor element is mounted on the main surface and includes a main surface electrode. The connection pad is formed of Cu, arranged with respect to the substrate, separated from the substrate, and includes a connection surface. The plated layer is formed of Ni and partially covers the connection surface. The wire is formed of Al and bonded to the main surface electrode and the plated layer. The encapsulation resin encapsulates the semiconductor element, the connection pad, the plated layer, and the wire.

There is provided an Ag alloy bonding wire for semiconductor devices which exhibits a favorable bond reliability in a high-temperature environment even when using a mold resin of high S content and can suppress a chip damage at the time of ball bonding. The Ag alloy bonding wire is characterized by containing at least one element selected from the group consisting of Pd and Pt (hereinafter referred to as a “first element”) and at least one element selected from the group consisting of P, Cr, Zr and Mo (hereinafter referred to as a “second element”) so as to satisfy

[00001]$0.05\le \text{x}1\le 3.0,\text{and}$

[00002]$15\le \text{x}2\le 700$

where x1 is a total concentration of the first element [at.%] and x2 is a total concentration of the second element [at. ppm], with the balance including Ag.

There is provided an Ag alloy bonding wire for semiconductor devices which exhibits a favorable bond reliability in a high-temperature environment even when using a mold resin of high S content and can suppress a chip damage at the time of ball bonding. The Ag alloy bonding wire is characterized by containing at least one element selected from the group consisting of Pd and Pt (hereinafter referred to as a “first element”) and at least one element selected from the group consisting of P, Cr, Zr and Mo (hereinafter referred to as a “second element”) so as to satisfy

[00001]$0.05\le \text{x}1\le 3.0,\text{and}$

[00002]$15\le \text{x}2\le 700$

where x1 is a total concentration of the first element [at.%] and x2 is a total concentration of the second element [at. ppm], with the balance including Ag.

Embodiments include a microelectronic package structure having a substrate with one or more substrate pads on a first side of the package substrate. A ball interconnect structure is on the substrate pad, the ball interconnect structure comprising at least 99.0 percent gold. A discrete component having two or more component terminals is on the ball interconnect structure.

Embodiments include a microelectronic package structure having a substrate with one or more substrate pads on a first side of the package substrate. A ball interconnect structure is on the substrate pad, the ball interconnect structure comprising at least 99.0 percent gold. A discrete component having two or more component terminals is on the ball interconnect structure.

The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for memories, the bonding wire including a core material containing one or more of Ga, In, and Sn for a total of 0.1 to 3.0 at % with a balance being made up of Ag and incidental impurities; and a coating layer formed over a surface of the core material, containing one or more of Pd and Pt, or Ag and one or more of Pd and Pt, with a balance being made up of incidental impurities, wherein the coating layer is 0.005 to 0.070 μm in thickness.

The present invention provides a bonding wire capable of simultaneously satisfying ball bonding reliability and wedge bondability required of bonding wires for memories, the bonding wire including a core material containing one or more of Ga, In, and Sn for a total of 0.1 to 3.0 at % with a balance being made up of Ag and incidental impurities; and a coating layer formed over a surface of the core material, containing one or more of Pd and Pt, or Ag and one or more of Pd and Pt, with a balance being made up of incidental impurities, wherein the coating layer is 0.005 to 0.070 μm in thickness.

In one example, a semiconductor structure or device comprises a substrate comprising a conductive structure having a top side and a first shielding terminal on the top side of the conductive structure, an electronic component on the top side of the conductive structure, a package body on the top side of the conductive structure and contacting a side of the electronic component, a shield on a top side of the package body and a lateral side of the package body, and a shield interconnect coupling the shield to the first shielding terminal of the conductive structure. Other examples and related methods are also disclosed herein.