H01L2924/30107

STACKED INDUCTORS IN MULTI-DIE STACKING

Microelectronic devices having stacked electromagnetic coils are disclosed. In one example, a microelectronic device can include a first semiconductor element and a second semiconductor element disposed on the first semiconductor element. The microelectronic device can also include an electromagnetic coil. A first portion of the electromagnetic coil and a second portion of the electromagnetic coil may be spaced apart by the first semiconductor element. A first conductive via extending through the first semiconductor element may connect the first and second portions of the electromagnetic coil. Methods for forming such microelectronic devices are also disclosed.

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
20230119348 · 2023-04-20 ·

A semiconductor package includes a package substrate, a semiconductor chip and a plurality of bonding wires. The package substrate includes a connection pad. The semiconductor chip is disposed over the package substrate and includes a chip pad, a bonding pad, and a redistribution layer. The bonding pad is closer to a periphery of the semiconductor chip than the chip pad. The redistribution layer is connected between the chip pad and the bonding pad. The bonding wires are connected in parallel between the connection pad and the bonding pad.

Band stop filter structure and method of forming

A filter structure includes a ground plane in a first metal layer of an integrated circuit (IC) package, a plate in a second metal layer of the IC package, a dielectric layer between the ground plane and the plate, the ground plane, the dielectric layer, and the plate thereby being configured as a capacitive device, and an inductive device in a third metal layer of the IC package. The inductive device is electrically connected to the plate, and the plate and the inductive device are configured to have a resonance frequency greater than 1 GHz.

SEMICONDUCTOR DEVICE
20230163069 · 2023-05-25 ·

A semiconductor device includes a first semiconductor element, a second semiconductor element, an insulating layer, a sealing resin, a first external terminal, a second external terminal, a first connecting conductor and a second connecting conductor. Each of the semiconductor elements has an element front surface, an element back surface, and a plurality of front surface electrodes disposed on the element front surface. The insulating layer has an insulating layer back surface facing each of the element front surfaces and an insulating layer front surface facing away from the insulating layer back surface. The sealing resin has a resin front surface in contact with the insulating layer back surface and a resin back surface facing away from the resin front surface. The sealing resin covers a portion of each semiconductor element. Each external terminal is disposed between the first and the second semiconductor elements and exposed from the resin back surface. The first connecting conductor is disposed on the insulating layer and connects at least one of the front surface electrodes of the first semiconductor element to the first external terminal. The second connecting conductor is disposed on the insulating layer and connects at least one of the front surface electrodes of the second semiconductor to the second terminal.

PACKAGE STRUCTURE AND PACKAGING METHOD

A package structure includes: a heat dissipation substrate; at least one die, including a signal transmitting side and a heat conduction side, wherein the signal transmitting side and the heat conduction side are two opposite sides on the die, and the heat conduction side is disposed on and in contact with the heat dissipation substrate; plural metal bumps, disposed on the signal transmitting side; and a package material, encapsulating the die, a side of the heat dissipation substrate in contact with the die, and the metal bumps, wherein a portion of each metal bump is exposed to an outside of the package material.

Switching power supply module and packaging method thereof

A switching power supply module includes a power inductor which includes a magnetic core and L-shaped metal end electrodes and a switching power supply chip which includes a packaging body, a bare chip and a bottom bonding pad of the bare chip; the L-shaped metal end electrode includes a first electrode part which is welded at 90° to the magnetic core and a second electrode part which extends in parallel from the first electrode part to the middle of the magnetic core and is perpendicular to the first electrode part; the bare chip and the packaging body are embedded between the first, the second electrode part and the magnetic core; the bottom bonding pad abuts between the two second electrode parts and is insulated from the second electrode part, and the weld face of the bottom bonding pad is flush with that of the second electrode part.

Radio frequency module and communication device

A radio frequency module includes: a module board that includes a first principal surface and a second principal surface on opposite sides of the module board; a power amplifier configured to amplify a transmission signal; a first circuit component; and a power amplifier (PA) control circuit configured to control the power amplifier. The power amplifier and the PA control circuit are stacked on the first principal surface, and the first circuit component is disposed on the second principal surface.

SEMICONDUCTOR DEVICE

A semiconductor device of a hybrid type includes: a light-emitting element forming a power loop; a semiconductor integrated circuit element including a switching element; and a bypass capacitor. The light-emitting element and the switching element constitute a layered body in which respective principal surfaces of the light-emitting element and the switching element are layered in parallel and face-to-face. The bypass capacitor includes one electrode connected to a lower element of the layered body, and an other electrode connected to an upper element of the layered body. In a plan view, when a direction from the one electrode to the other electrode inside the bypass capacitor is a first direction, the bypass capacitor is arranged so that a side of the bypass capacitor parallel to the first direction includes a portion that is parallel to and faces one peripheral side of the layered body.

CHIP PACKAGE
20230073104 · 2023-03-09 ·

A display device comprises a display panel substrate and a glass substrate over said display panel substrate, wherein said display panel substrate comprises multiple contact pads, a display area, a first boundary, a second boundary, a third boundary and a fourth boundary, wherein said display area comprises a first edge, a second edge, a third edge and a fourth edge, wherein said first boundary is parallel to said third boundary and said first and third edges, wherein said second boundary is parallel to said fourth boundary and said second and fourth edges, wherein a first least distance between said first boundary and said first edge, wherein a second least distance between said second boundary and said second edge, a third least distance between said third boundary and said third edge, a fourth distance between said fourth boundary and said fourth edge, and wherein said first, second, third and fourth least distances are smaller than 100 micrometers, and wherein said glass substrate comprising multiple metal conductors through in said glass substrate and multiple metal bumps are between said glass substrate and said display panel substrate, wherein said one of said metal conductors is connected to one of said contact pads through one of said metal bumps.

CHIP PACKAGE
20230073104 · 2023-03-09 ·

A display device comprises a display panel substrate and a glass substrate over said display panel substrate, wherein said display panel substrate comprises multiple contact pads, a display area, a first boundary, a second boundary, a third boundary and a fourth boundary, wherein said display area comprises a first edge, a second edge, a third edge and a fourth edge, wherein said first boundary is parallel to said third boundary and said first and third edges, wherein said second boundary is parallel to said fourth boundary and said second and fourth edges, wherein a first least distance between said first boundary and said first edge, wherein a second least distance between said second boundary and said second edge, a third least distance between said third boundary and said third edge, a fourth distance between said fourth boundary and said fourth edge, and wherein said first, second, third and fourth least distances are smaller than 100 micrometers, and wherein said glass substrate comprising multiple metal conductors through in said glass substrate and multiple metal bumps are between said glass substrate and said display panel substrate, wherein said one of said metal conductors is connected to one of said contact pads through one of said metal bumps.