A composite interposer can include a substrate element and a support element. The substrate element can have first and second opposite surfaces defining a thickness of 200 microns or less, and can have a plurality of contacts exposed at the first surface and electrically conductive structure extending through the thickness. The support element can have a body of at least one of dielectric or semiconductor material exposed at a second surface of the support element, openings extending through a thickness of the body, conductive vias extending within at least some of the openings in a direction of the thickness of the body, and terminals exposed at a first surface of the support element. The second surface of the support element can be united with the second surface of the substrate element. The terminals can be electrically connected with the contacts through the conductive vias and the electrically conductive structure.

An apparatus includes a first conductor trace arranged to electrically couple a first complementary signal to provide differential signaling. The first conductor trace includes a first plurality of split traces to conduct the first complementary signal, and a first plurality of tie bars to connect the first split traces.

A high-frequency module includes a semiconductor chip device that is mounted on an external circuit substrate by wire bonding. A switch forming section, a power amplifier forming section and a low noise amplifier forming section, realized by a group of FETs, which are active elements, are formed in the semiconductor chip device. Flat plate electrodes, which form capacitors are formed in the semiconductor chip device. Conductor wires that connect the external circuit substrate and the semiconductor chip device function as inductors. A group of passive elements that includes inductors and capacitors is formed. As a result, a high-frequency module that can be reduced in size while still obtaining the required transmission characteristic is realized.

A high-frequency module includes a semiconductor chip device that is mounted on an external circuit substrate by wire bonding. A switch forming section, a power amplifier forming section and a low noise amplifier forming section, realized by a group of FETs, which are active elements, are formed in the semiconductor chip device. Flat plate electrodes, which form capacitors are formed in the semiconductor chip device. Conductor wires that connect the external circuit substrate and the semiconductor chip device function as inductors. A group of passive elements that includes inductors and capacitors is formed. As a result, a high-frequency module that can be reduced in size while still obtaining the required transmission characteristic is realized.

Disclosed herein is a semiconductor device including: a semiconductor circuit element configured to process an electrical signal having a predetermined frequency; and a transmission line configured to be connected to the semiconductor circuit element via a wire and transmit the electrical signal. An impedance matching pattern having a symmetric shape with respect to a direction of the transmission line is provided in the transmission line.

Embodiments of the present invention provide for the application of strain inducing layers to enhance the mobility of transistors formed on semiconductor-on-insulator (SOI) structures. In one embodiment, a method for fabricating an integrated circuit is disclosed. In a first step, active circuitry is formed in an active layer of a SOI wafer. In a second step, substrate material is removed from a substrate layer disposed on a back side of the SOI wafer. In a third step, insulator material is removed from the back side of the SOI wafer to form an excavated insulator region. In a fourth step, a strain inducing material is deposited on the excavated insulator region. The strain inducing material interacts with the pattern of excavated insulator such that a single layer provides both tensile and compressive stress to p-channel and n-channel transistors, respectively. In alternative embodiments, the entire substrate is removed before forming the strain inducing material.

Embodiments of semiconductor devices (e.g., RF devices) include a substrate, an isolation structure, an active device, a lead, and a circuit. The isolation structure is coupled to the substrate, and includes an opening. An active device area is defined by a portion of the substrate surface that is exposed through the opening. The active device is coupled to the substrate surface within the active device area. The circuit is electrically coupled between the active device and the lead. The circuit includes one or more elements positioned outside the active device area (e.g., physically coupled to the isolation structure and/or under the lead). The elements positioned outside the active device area may include elements of an envelope termination circuit and/or an impedance matching circuit. Embodiments also include method of manufacturing such semiconductor devices.

Embodiments of semiconductor devices (e.g., RF devices) include a substrate, an isolation structure, an active device, a lead, and a circuit. The isolation structure is coupled to the substrate, and includes an opening. An active device area is defined by a portion of the substrate surface that is exposed through the opening. The active device is coupled to the substrate surface within the active device area. The circuit is electrically coupled between the active device and the lead. The circuit includes one or more elements positioned outside the active device area (e.g., physically coupled to the isolation structure and/or under the lead). The elements positioned outside the active device area may include elements of an envelope termination circuit and/or an impedance matching circuit. Embodiments also include method of manufacturing such semiconductor devices.

An inductor structure includes a first inductor and a second inductor. The second inductor includes a loop that surrounds the first inductor. The first inductor includes a first loop and a second loop, and a crossover section coupling the first loop to the second loop so as to cause current flowing through the first inductor to circulate around the first loop in a first rotational direction and around the second loop in a second rotational direction opposite to the first rotational direction; wherein the first and second inductors are arranged in an equilibrated configuration about a first axis that bisects the inductor structure such that the first loop is on one side of the first axis and the second loop is on a second side of the first axis, such that the magnetic interaction between the inductors due to current flow in the inductors is cancelled out.

A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.