H01L2924/3011

Wire bond through-via structure and method

A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.

RF transistor packages with high frequency stabilization features and methods of forming RF transistor packages with high frequency stabilization features
09741673 · 2017-08-22 · ·

A packaged RF transistor device includes an RF transistor die including a plurality of RF transistor cells, an RF input lead coupled to the plurality of RF transistor cells, an RF output lead, and an output matching network coupled between the plurality of RF transistor cells and the RF output lead. The output matching network includes a plurality of capacitors having respective upper capacitor plates, wherein the upper capacitor plates of the capacitors are coupled to output terminals of respective ones of the RF transistor cells. The plurality of capacitors may be provided as a capacitor block that includes a common reference capacitor plate and a dielectric layer on the reference capacitor plate. The upper capacitor plates may be on the dielectric layer.

Monolithic Ceramic Component and Production Method

A film stack made from compacted green films and capable of being sintered to form a ceramic component with monolithic multi-layer structure is disclosed. The film stack includes a functional layer comprising a green film comprising a functional ceramic and a tension layer comprising a green film comprising a dielectric material. The tension layer is directly adjacent to the functional layer in the multi-layer structure. The multilayer structure also includes a first metallization plane and second metallization plane. The functional layer is between the first metallization plane and the second metallization plane.

RADIO IC DEVICE

A radio IC device includes an electromagnetic coupling module includes a radio IC chip arranged to process transmitted and received signals and a feed circuit board including an inductance element. The feed circuit board includes an external electrode electromagnetically coupled to the feed circuit, and the external electrode is electrically connected to a shielding case or a wiring cable. The shielding case or the wiring cable functions as a radiation plate. The radio IC chip is operated by a signal received by the shielding case or the wiring, and the answer signal from the radio IC chip is radiated from the shielding case or the wiring cable to the outside. A metal component functions as the radiation plate, and the metal component may be a ground electrode disposed on the printed wiring board.

RADIO IC DEVICE

A radio IC device includes an electromagnetic coupling module includes a radio IC chip arranged to process transmitted and received signals and a feed circuit board including an inductance element. The feed circuit board includes an external electrode electromagnetically coupled to the feed circuit, and the external electrode is electrically connected to a shielding case or a wiring cable. The shielding case or the wiring cable functions as a radiation plate. The radio IC chip is operated by a signal received by the shielding case or the wiring, and the answer signal from the radio IC chip is radiated from the shielding case or the wiring cable to the outside. A metal component functions as the radiation plate, and the metal component may be a ground electrode disposed on the printed wiring board.

Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP
09735113 · 2017-08-15 · ·

A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. A plurality of conductive vias is formed through the encapsulant around the first and second semiconductor die. A portion of the encapsulant and a portion of a back surface of the first and second semiconductor die is removed. An interconnect structure is formed over the encapsulant and the back surface of the first or second semiconductor die. The interconnect structure is electrically connected to the conductive vias. The carrier is removed. A heat sink or shielding layer can be formed over the encapsulant and first semiconductor die.

Semiconductor device and method of forming ultra thin multi-die face-to-face WLCSP
09735113 · 2017-08-15 · ·

A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. A plurality of conductive vias is formed through the encapsulant around the first and second semiconductor die. A portion of the encapsulant and a portion of a back surface of the first and second semiconductor die is removed. An interconnect structure is formed over the encapsulant and the back surface of the first or second semiconductor die. The interconnect structure is electrically connected to the conductive vias. The carrier is removed. A heat sink or shielding layer can be formed over the encapsulant and first semiconductor die.

Stacked chip-on-board module with edge connector
09735093 · 2017-08-15 · ·

A module can include a module card and first and second microelectronic elements having front surfaces facing a first surface of the module card. The module card can also have a second surface and a plurality of parallel exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Each microelectronic element can be electrically connected to the module card. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

Stacked chip-on-board module with edge connector
09735093 · 2017-08-15 · ·

A module can include a module card and first and second microelectronic elements having front surfaces facing a first surface of the module card. The module card can also have a second surface and a plurality of parallel exposed edge contacts adjacent an edge of at least one of the first and second surfaces for mating with corresponding contacts of a socket when the module is inserted in the socket. Each microelectronic element can be electrically connected to the module card. The front surface of the second microelectronic element can partially overlie a rear surface of the first microelectronic element and can be attached thereto.

Package structure and manufacturing method thereof
09735091 · 2017-08-15 · ·

The invention discloses a package structure for better heat-dissipation or EMI performance. A first conductive element and a second conductive element are both disposed between the top lead frame and the bottom lead frame. The first terminal of the first conductive element is electrically connected to the bottom lead frame, and the second terminal of the first conductive element is electrically connected to the top lead frame. The third terminal of the second conductive element is electrically connected to the bottom lead frame, and the fourth terminal of the second conductive element is electrically connected to the top lead frame. In one embodiment, a heat dissipation device is disposed on the top lead frame. In one embodiment, the molding compound is provided such that the outer leads of the top lead frame are exposed outside the molding compound.