Microelectronic assemblies, and related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component, embedded in a first dielectric layer, including a surface and one or more side surfaces at least partially encapsulated by a first magnetic conductive material; and a second microelectronic component, embedded in a second dielectric layer on the first dielectric layer, including a surface and one or more side surfaces at least partially encapsulated by a second magnetic conductive material, wherein the second microelectronic component is coupled to the surface of the first microelectronic component by a hybrid bonding region, and wherein the second magnetic conductive material is coupled to the first magnetic conductive material.

A semiconductor package includes a semiconductor device on a first redistribution substrate and having a first sidewall, and a mold layer that covers the semiconductor device and the first redistribution substrate. The first redistribution substrate includes a first redistribution dielectric layer, a first reinforcement pattern on the first redistribution dielectric layer and overlapping the semiconductor device and the mold layer, and first and second bonding pads that penetrate the first redistribution dielectric layer and contact the first reinforcement pattern. The second bonding pad is spaced apart from the first bonding pad in a first direction. The first bonding pad has a first width in a second direction orthogonal to the first direction. When viewed in a plan view, the first reinforcement pattern has a second width in the second direction below the first sidewall. The second width is greater than the first width.

A connection body which comprises a base structure at least predominantly made of a semiconductor oxide material or glass material, and an electrically conductive wiring structure on and/or in the base structure, wherein the electrically conductive wiring structure comprises at least one vertical wiring section with a first lateral dimension on and/or in the base structure and at least one lateral wiring section connected with the at least one vertical wiring section, wherein the at least one lateral wiring section has a second lateral dimension on and/or in the base structure, which is different to the first lateral dimension.

A semiconductor package includes a magnetic layer including an inner portion having a predetermined area and an outer portion disposed outward of the inner portion, a lower polymer layer disposed below the magnetic layer, and a dicing surface formed by ends of the magnetic layer and the lower polymer layer and extending along a stacked direction of the magnetic layer and the lower polymer layer. At least a part of the outer portion of the magnetic layer includes an inclined surface inclined downward in the stacked direction, and has a thickness greater than a thickness of the inner portion in the stacked direction.

A semiconductor package includes a front redistribution structure having a first surface and a second surface, opposite to the first surface, a dielectric layer, an antenna substrate including a plurality of antenna members in the dielectric layer, a semiconductor chip having a connection pad connected to the plurality of antenna members, a conductive core structure having a first through-hole accommodating the antenna substrate and a second through-hole accommodating the semiconductor chip, and a rear redistribution structure including a conductive cover layer exposing an upper portion of the antenna substrate and covering an upper portion of the semiconductor chip, and a conductive via connecting the conductive cover layer to the conductive core structure.

The present disclosure provides a semiconductor structure, comprising a die/die stack attached on a substrate, a conductive top block covering a top surface of the die/die stack, and a plurality of ground wires conductively connect the conductive top block and to the substrate. The conductive top block, the plurality of ground wires, and the substrate form a Faraday cage to provide an electromagnetic interference shielding of the die/die stack.

A circuit module (100) includes: a substrate (10) including a plurality of inner conductors (2); a first electronic component arranged on one main surface (S1) of the substrate (10); a first resin layer (40) provided on the one main surface (S1) and configured to seal the first electronic component; a plurality of outer electrodes (B1) provided on another main surface (S2) of the substrate (10) and including a ground electrode; a conductor film (50) provided at least on an outer surface of the first resin layer (40) and a side surface (S3) of the substrate (10) and connected to the ground electrode with at least one of the plurality of inner conductors (2) interposed therebetween; and a resin film (60).

Disclosed embodiments include composite-bridge die-to-die interconnects that are on a die side of an integrated-circuit package substrate and that contacts two IC dice and a passive device that is in a molding material, where the molding material also contacts the two IC dice.

A device includes an interposer including an insulative layer between a lower metal layer and a first upper metal layer and a second upper metal layer, a semiconductor transistor die attached to the first upper metal layer and comprising a first lower main face and a second upper main face, with a drain or collector pad on the first main face and electrically connected to the first upper metal layer, a source or emitter electrode pad and a gate electrode pad on the second main face, a leadframe connected to the interposer and comprising a first lead connected with the first upper metal layer, a second lead connected with the source electrode pad, and a third lead connected with the second upper metal layer, and wherein an electrical connector that is connected between the gate electrode pad and the second upper metal layer is orthogonal to a first electrical connector.

A Faraday cage cavity package, having: a leadframe; a plastic body molded onto the leadframe to form a cavity exposing top surfaces of a die attach paddle, tie bars and lead fingers of the leadframe within the cavity; and a lid attached onto the top of the leadframe to protect a die attached to the die attach pad from electromagnetic fields, wherein the Faraday cage cavity package is manufactured in a matrix format and then separated into a plurality of individual Faraday cage cavity package units.