Patent classifications
H01L2924/3701
Thermocompression for semiconductor chip assembly
An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A non-leaded semiconductor device comprises a sealing body for sealing a semiconductor chip, a tab in the interior of the sealing body, suspension leads for supporting the tab, leads having respective surfaces exposed to outer edge portions of a back surface of the sealing body, and wires connecting pads formed on the semiconductor chip and the leads. End portions of the suspension leads positioned in an outer periphery portion of the sealing body are unexposed to the back surface of the sealing body, but are covered with the sealing body. Stand-off portions of the suspending leads are not formed in resin molding. When cutting the suspending leads, corner portions of the back surface of the sealing body are supported by a flat portion of a holder portion in a cutting die having an area wider than a cutting allowance of the suspending leads, whereby chipping of the resin is prevented.
THERMOCOMPRESSION FOR SEMICONDUCTOR CHIP ASSEMBLY
An assembly of a semiconductor chip having pads to a substrate having pads aligned to receive the semiconductor chip is provided, whereby at least one of the semiconductor chip pads and substrate pads include solder bumps. The solder bumps are deformed against the substrate pads and the semiconductor chip pads, whereby an underfill material is applied to fill the gap between the semiconductor chip and substrate. The underfill material does not penetrate between the deformed solder bumps, the semiconductor chip pads, and the substrate pads. At least one of the solder bumps have not been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads, and at least another one of the solder bumps have been melted or reflowed to make a metallurgical bond between the semiconductor chip pads and the substrate pads.
Flip chip bonder and flip chip bonding method
Provided is a flip chip bonder including: a pickup flipping collet configured to flip a chip; and a bonding tool configured to receive the chip flipped with the pickup flipping collet from the pickup flipping collet and to bond the received chip to a circuit board. The pickup flipping collet includes a cooling channel through which cooling air flows to cool the pickup flipping collet. Thus, bonding time can be reduced without lowering bonding quality.
SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME, AND POWER CONVERSION APPARATUS
A semiconductor apparatus includes a semiconductor device, a lower wire member, and an upper wire member. The semiconductor device includes a semiconductor device body having a main surface, and a metal layer. The lower wire member includes an end surface and an end surface. In a plan view of the main surface, the end surface and the end surface are located inside a periphery of the semiconductor device. The upper wire member is stacked on the lower wire member. In the plan view of the main surface, a portion of the upper wire member is located outside the periphery of the semiconductor device. The upper wire member is joined to the metal layer with the lower wire member being interposed therebetween.
Semiconductor device and measurement device
A semiconductor device includes: an oscillator including external terminals disposed on a first face with a specific distance along a first direction; an integrated circuit including a first region formed with first electrode pads along one side, and a second region formed with second electrode pads on two opposing sides of the first region; a lead frame that includes terminals at a peripheral portion, and on which the oscillator and the integrated circuit are mounted such that the external terminals, the first and second electrode pads face in a substantially same direction and such that one side of the integrated circuit is substantially parallel to the first direction; a first bonding wire that connects one external terminal to one first electrode pad; a second bonding wire that connects one terminal of one lead frame to one second electrode pad; and a sealing member that seals all of the components.
METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE
A method for producing a semiconductor device includes preparing a first semiconductor substrate having a first substrate body, a first insulating layer, and a plurality of first electrodes, preparing a second semiconductor substrate having a second substrate body, a second insulating layer, and a plurality of second electrodes, bonding the first insulating layer and the second insulating layer to each other while joining the plurality of first electrodes to the plurality of second electrodes to obtain a hybrid bonding structure, forming a plurality of connection bumps on the second substrate body, dicing the hybrid bonding structure to obtain a plurality of hybrid bonding structure components, mounting the first hybrid bonding structure component on another member, injecting a first liquid material into a gap between the first hybrid bonding structure component and the other member, and curing the first liquid material.
Efficient integration of a first substrate without solder bumps with a second substrate having solder bumps
A method of forming a semiconductor structure having a first substrate capable of electrically and mechanically connecting to a second substrate includes providing a first substrate without a solder bump. A solder bump receiving metal is formed over a top interconnect metal of the first substrate. The solder bump receiving metal may include platinum, a platinum alloy, nickel, or a nickel alloy. A passivation layer is formed, wherein the passivation layer is not situated under any portion of the solder bump receiving metal. A window is formed exposing a portion of the solder bump receiving metal. The method may further include providing a second substrate with a second substrate solder bump. The second substrate solder bump may be mechanically and electrically connecting to the exposed portion of the solder bump receiving metal of the first substrate.