A microstrip that is usable in a quantum application (q-microstrip) includes a ground plane, a polyimide film disposed over the ground plane at a first surface of the polyimide film, and a conductor formed on a second side of the polyimide film such that the first surface is substantially opposite to the second surface. A material of the conductor provides greater than a threshold thermal conductivity (T.sub.H) with a structure of a dilution fridge stage (stage).

A high frequency coupler is disclosed that is configured for grid array-type surface mounting. The coupler includes a monolithic base substrate having a top surface and a bottom surface. A first thin film microstrip and a second thin film microstrip are each disposed on the top surface of the monolithic base substrate. Each microstrip has an input end and an output end. At least one via extends through the monolithic base substrate from the top surface to the bottom surface of the monolithic base substrate. The via(s) are electrically connected with at least one of the input end or the output end of the first microstrip or the second microstrip. The coupler has a coupling factor that is greater than about −30 dB at about 28 GHz.

A phased circular array of antennas each having an omnidirectional radiation pattern are disposed on an outside surface of a planar sheet conformed to the shape of a cylinder. A plurality of coplanar waveguides includes a ground line and a signal line feeding the antennas is disposed on the outside surface of the cylinder. A signal-carrying feed network electromagnetically coupled to the coplanar waveguides is disposed on an inside surface of the cylinder which does not interfere with radiation from the antennas. An electrical ground is disposed on the outside surface of the cylinder which is connected to the ground feed of each of the coplanar waveguides and serves as a ground plane for the signal-carrying feed network. The array is configured to provide 360° beam steering around the vertical axis of the cylinder. A method of fabrication is disclosed.

A dielectric substrate for RF, microwave, or millimeter wave devices, circuits, or surfaces includes a propagating region for transmitting or reflecting an electromagnetic field, and one or more material-filled vias located within the propagating region. The application of an external electric or magnetic field to the material-filled vias may be used to tune the electric permittivity or the magnetic permeability of the fill material and hence control the effective electric permittivity or the effective magnetic permeability of the dielectric substrate within the propagating region. A dimension of the material-filled vias may be less than half of a wavelength of the propagating electromagnetic field. The fill material may include liquid crystals, a ferroelectric crystal composite, a ferromagnetic crystal composite, organic semiconductors, and/or electro-optic or magneto-optic polymers.

The disclosure relates to a pre-5.sup.th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4.sup.th-Generation (4G) communication system such as Long Term Evolution (LTE). A transmission line structure of a wireless communication system is provided. The transmission line includes a ground area, a signal line, and a support. A first surface of the signal line is disposed to be spaced apart from the ground area via an air layer therebetween, a second surface of the signal line located opposite to the first surface may be coupled to the support, and the support may be coupled to the ground area.

A stacked, multi-layer transmission line is provided. The stacked transmission line includes at least a pair of conductive traces, each conductive trace having a plurality of conductive stubs electrically coupled thereto. The stubs are disposed in one or more separate spatial layers from the conductive traces.

A structure of transmission line includes a first transmission line, a second transmission line and an interlayer via. The first transmission line includes a first line segment, a second segment and a first signal via. The second transmission line includes a third line segment, a fourth segment and a second signal via. Both of the first line segment and the third line segment are disposed in a first signal transmission layer and extend along a first direction. Both of the second line segment and the fourth line segment are disposed in a second signal transmission layer and extend along a second direction. The first signal via is connected to the first line segment and the second line segment. The second signal via is connected to the third line segment and the fourth line segment. The interlayer via is adjacent to the first line segment or the second line segment.

Systems and methods are provided for an integrated chip. An integrated chip includes a package substrate including a plurality of first layers and a plurality of second layers, each second layer being disposed between a respective adjacent pair of the first layers. A transceiver unit is disposed above the package substrate. A waveguide unit including a plurality of waveguides having top and bottom walls formed in the first layers of the package substrate and sidewalls formed in the second layers of the package substrate.

The present invention relates to a two-end driving, high-frequency sub-substrate structure, comprising a sub-substrate body, wherein: the sub-substrate body has an upper side provided with a first signal pad area and a second signal pad area, the first signal pad area and the second signal pad area are symmetric with respect to each other, each of the first signal pad area and the second signal pad area extends from one of two lateral portions of the sub-substrate body in an extending direction toward a center of the sub-substrate body and terminates in an end, the end of the first signal pad area is adjacent to but spaced from the end of the second signal pad area, the first signal pad area is configured for supporting a semiconductor chip provided thereon, the second signal pad area is provided with a jumper wire connected to an electrode of the semiconductor chip, there are two grounding pad areas provided respectively on two lateral sides of the first signal pad area and the second signal pad area and constituting a portion of a coplanar waveguide, the sub-substrate body has an inner layer or bottom side that is provided with a grounding layer or combined with a grounding layer.

Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a substrate with a first surface and a second surface opposite from the first surface, where the substrate comprises glass. In an embodiment, the electronic package further comprises a trace embedded in the substrate, where a width of the trace is less than a height of the trace. In an embodiment, the electronic package further comprises a first layer on the first surface of the substrate, where the first layer is a dielectric buildup film, and a second layer on the second surface of the substrate, where the second layer is the dielectric buildup film.