An EMI filtering, coaxial power connector may be formed as an inline component or a port of a device. The connector may have dimensions to accept F-type coaxial connectors. The connector includes a conductive outer shell with a first opening and a second opening. A dielectric member is disposed within the shell. A conductive pin is supported by the dielectric member. A feed-through capacitor has a central opening and a first lead formed within the central opening. The pin is electrically connected to the first lead. A second lead of the capacitor is formed at an outer perimeter of the capacitor and is electrically connected to the shell. A metal plate is mounted within the shell. The plate is disk-shaped with a central hole. An outer perimeter of the plate is in electrical contact with the shell. The pin passes through the central hole without making electrical contact with the plate, and the plate resides between the second opening of the shell and the capacitor.

A three-terminal flat-through EMI/energy dissipating filter comprises an active electrode plate through which a circuit current passes between a first terminal and a second terminal, a first shield plate on a first side of the active electrode plate, and second shield plate on a second side of the active electrode plate opposite the first shield plate. The first and second shield plates are conductively coupled to a grounded third terminal. Both the effective capacitance area or overlapping surface area of the active electrode plate and the surrounding ground shield plates and the dielectric constant of the insulating layers between the active electrode plate and the ground shield plates is raised to achieve a higher capacitance value for the three-terminal flat-through capacitor.

A three-terminal flat-through EMI/energy dissipating filter comprises an active electrode plate through which a circuit current passes between a first terminal and a second terminal, a first shield plate on a first side of the active electrode plate, and second shield plate on a second side of the active electrode plate opposite the first shield plate. The first and second shield plates are conductively coupled to a grounded third terminal. Both the effective capacitance area or overlapping surface area of the active electrode plate and the surrounding ground shield plates and the dielectric constant of the insulating layers between the active electrode plate and the ground shield plates is raised to achieve a higher capacitance value for the three-terminal flat-through capacitor.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active end metallization that is electrically connected to the active electrode plates and a ground end metallization that is electrically connected to the at least one ground electrode plates of the chip capacitor. There is a ground path electrically extending between the ground end metallization of the chip capacitor and the ferrule. The ground path comprises at least a first electrical connection material connected directly to the first gold braze, and at least an internal ground plate disposed within the circuit board substrate with the internal ground plate being electrically connected to both the first electrical connection material and the ground end metallization of the chip capacitor. An active path electrically extends between the active end metallization of the chip capacitor and the lead wire.

An EMI/energy dissipating filter for an active implantable medical device (AIMD) is described. The filter comprises a first gold braze hermetically sealing the insulator to a ferrule that is configured to be mounted in an opening in a housing for the AIMD. A lead wire is hermetically sealed in a passageway through the insulator by a second gold braze. A circuit board substrate is disposed adjacent the insulator. A two-terminal chip capacitor disposed adjacent to the circuit board has an active end metallization that is electrically connected to the active electrode plates and a ground end metallization that is electrically connected to the at least one ground electrode plates of the chip capacitor. There is a ground path electrically extending between the ground end metallization of the chip capacitor and the ferrule. The ground path comprises at least a first electrical connection material connected directly to the first gold braze, and at least an internal ground plate disposed within the circuit board substrate with the internal ground plate being electrically connected to both the first electrical connection material and the ground end metallization of the chip capacitor. An active path electrically extends between the active end metallization of the chip capacitor and the lead wire.

A connector is equipped with a housing capable of being fitted in a mating connector, a plurality of terminals which are held in the housing and electrically connected to each other, and a noise reduction member or members which are held in the housing. The mating connector is connected to brunch lines among a trunk line and the brunch lines constituting an electric circuit. One of the plurality of terminals is a trunk-line connection terminal which is a pressure contact terminal and is electrically connected to the trunk line directly, and a remaining terminals are branch-line connection terminals which are male terminals or female terminals and are electrically connected to the respective branch lines when the housing is connected to the mating connector. The noise reduction member is not disposed at the trunk-line connection terminal, and the noise reduction member is disposed at the branch-line connection terminal.

A connector is equipped with a housing capable of being fitted in a mating connector, a plurality of terminals which are held in the housing and electrically connected to each other, and a noise reduction member or members which are held in the housing. The mating connector is connected to brunch lines among a trunk line and the brunch lines constituting an electric circuit. One of the plurality of terminals is a trunk-line connection terminal which is a pressure contact terminal and is electrically connected to the trunk line directly, and a remaining terminals are branch-line connection terminals which are male terminals or female terminals and are electrically connected to the respective branch lines when the housing is connected to the mating connector. The noise reduction member is not disposed at the trunk-line connection terminal, and the noise reduction member is disposed at the branch-line connection terminal.

A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.

A circuit board for a high speed communication jack including a rigid circuit board in the housing having a substrate, a plurality of vias extending through the substrate with each via being configured to accommodate a pin on the housing, a plurality of traces on a middle layer in the substrate, with each trace extending from a corresponding one of the plurality of vias, a first shielding layer on a first side of the middle layer in the substrate, a second shielding layer on a second side of the middle layer in the substrate, and a third shielding layer adjacent to the second shielding layer.