Integrated circuitry is fabricated from semiconductor layers formed on a substrate, which include at least one n-type layer, an inverted p-type modulation doped quantum well (mod-doped QW) structure, a non-inverted n-type mod-doped QW structure, and at least one p-type layer including a first P+-type layer formed below a second P-type layer. An etch operation exposes the second p-type layer. P-type ions are implanted into the exposed second p-type layer. A gate electrode of a n-channel HFET device is formed in contact with the p-type ion implanted region. Source and drain electrodes of the n-channel HFET device are formed in contact with n-type ion implanted regions formed in contact with the n-type mod-doped QW structure. P-channel HFET devices, complementary BICFET devices, stacked complementary HFET devices and circuits and/or logic gates based thereon, and a variety of optoelectronic devices and optical devices can also be formed as part of the integrated circuitry.

The invention relates to, inter alia, a light-emitting semiconductor component comprising the following: a first mirror (102, 202, 302, 402, 502), a first conductive layer (103, 203, 303, 403, 503), a light-emitting layer sequence (104, 204, 304, 404, 504) on a first conductive layer face facing away from the first mirror, and a second conductive layer (105, 205, 305, 405, 505) on a light-emitting layer sequence face facing away from the first conductive layer, wherein the first mirror, the first conductive layer, the light-emitting layer sequence, and the second conductive layer are based on a III-nitride compound semiconductor material, the first mirror is electrically conductive, and the first mirror is a periodic sequence of homoepitaxial materials with varying refractive indices.

The invention relates to a radiation-emitting semiconductor body, having a first semiconductor region of a first doping type, which has a first material composition, a second semiconductor region of a second doping type, which has a second material composition, an active region, which is located between the first semiconductor region and the second semiconductor region, and a first intermediate region, which is located between the first semiconductor region and the active region, wherein the active region includes a plurality of quantum well layers and a plurality of barrier layers, which are arranged alternatingly one above the other, the barrier layers have a third material composition, the first intermediate region includes at least one first blocking layer and at least one first intermediate layer, and the first blocking layer has a fourth material composition and the first intermediate layer has a fifth material composition. The invention also relates to a laser diode and to a light-emitting diode.

An edge emitting laser (EEL) device includes a substrate, an n-type buffer layer, a first n-type cladding layer, a grating layer, a spacer layer, a lower confinement unit, an active layer, an upper confinement unit, a p-type cladding layer, a tunnel junction layer and a second n-type cladding layer sequentially arranged from bottom to top. The tunnel junction layer can stop an etching process from continuing to form the second n-type cladding layer into a predetermined ridge structure and converting a part of the p-type cladding layer into the n-type cladding layer to reduce series resistance of the EEL device. Therefore, the optical field and active layer tend to be coupled at the middle of the active layer, the lower half of the active layer can be utilized effectively, and the optical field is near to the grating layer to achieve better optical field/grating coupling efficiency and lower threshold current.

A vertical cavity surface emitting laser element includes first and second light reflecting layers, first, second and third semiconductor layer portions, an active layer, and first and second electrodes. The first semiconductor layer portion is disposed on the first light reflecting layer and contains a first impurity of a first conductivity type. The second semiconductor layer portion contains a second impurity of a second conductivity type. The third semiconductor layer portion is disposed on the second semiconductor layer portion, contains a third impurity of the first conductivity type at a higher concentration than a concentration of the first impurity, and has a thickness of 10 nm or more and less than 100 nm. The second light reflecting layer is disposed on the third semiconductor layer portion. The first electrode is electrically connected to the first semiconductor layer portion. The second electrode is in contact with the third semiconductor layer portion.

An optoelectronic device can include a first semiconductor layer with a mesa located on a portion of a surface thereof. The mesa can include an active region and a second semiconductor layer having a different conductivity than the first semiconductor layer. A contact can be located adjacent to the first semiconductor layer and the first semiconductor layer can be configured to distribute current flow away from a side of the mesa on which the contact is located. The first semiconductor layer can include a plurality of polarization doped channel layers.