A switched-mode power regulator circuit has four solid-state switches connected in series and a capacitor and an inductor that regulate power delivered to a load. The solid-state switches are operated such that a voltage at the load is regulated by repetitively (1) charging the capacitor causing a current to flow in the inductor and (2) discharging the capacitor causing current to flow in the inductor. The power regulator circuit may be configured to operate with zero current switching at frequencies in the range of 100 MHz, enabling it to be fabricated on a unitary silicon die along with the load that it powers.

Aspects of the invention overcome a monolithic approach to conventional low-frequency LPTs by using a high-frequency solid-state alternating current ac/ac modular powerconversion approach. Embodiments of the invention enable the ability to incorporate new technologies without in all cases redoing a LPT design from scratch. Furthermore, given that LPTs are for the long term, aspects of the invention ensure that they are durable, efficient, and fault tolerant with overloading capability.

A DC/DC power converter converts voltage at an input of the DC/DC power converter to a voltage at an output of the DC/DC power converter, where the output voltage is a multiple of the input voltage. The DC/DC power converter comprises two switching circuits electrically connected in series, two capacitors electrically connected in series, and a resonant circuit comprising a resonant capacitor and a resonant inductor. The series connection of the two capacitors is electrically connected in parallel to the series connection of the two switching circuits. The resonant circuit is electrically connected to the two switching circuits. A first capacitor of the two capacitors is electrically connected in parallel to the input. Each switching circuit comprises two switching units electrically connected in series, wherein each switching unit comprises two or more switches electrically connected in series.

To facilitate current sensing for valley current-controlled power converters, an example apparatus includes a comparator having a first terminal, a second terminal, and an output. A first transistor has a first drain coupled to the first terminal of the comparator. A second transistor has a second drain coupled to the first terminal of the comparator. A third transistor has a third drain coupled to the second terminal of the comparator.

A synchronous full-bridge rectifier circuit includes: a first high-side transistor, a first low-side transistor, a second high-side transistor and a second low-side transistor which are configured to generate a DC power source from an AC power source, wherein the first high-side transistor and the first low-side transistor are coupled to a live wire of the AC power source, and the second high-side transistor and the second low-side transistor are coupled to a neutral wire of the AC power source; a first detection transistor, coupled to the live wire and configured to generate a first detection signal; and a second detection transistor, coupled to the neutral wire configured to generate a second detection signal; wherein the first low-side transistor is turned on after the body-diode of the first low-side transistor is turned on; the second low-side transistor is turned on after the body-diode of the second low-side transistor is turned on.

A resonant switching power converter includes: at least one capacitor; switches coupled to the at least one capacitor; at least one charging inductor; at least one discharging inductor; and a zero current estimation circuit. The switches switch electrical connection relationships of capacitors according to an operation signal. The zero current estimation circuit estimates a time point at which a charging resonant current is zero during a charging process and/or estimate a time point at which a discharging resonant current is zero during at least one discharging process according to voltage differences across two ends of the charging inductor and/or the discharging inductor, so as to correspondingly generate a zero current estimation signal. The zero current estimation signal is adopted to generate the operation signal.

A method comprises configuring a power converter to operate as a boost converter, the power converter comprising a low side switch and a high side switch, during a first dead time after turning off the low side switch and before turning on the high side switch, configuring the power converter such that a current of the power converter flows through a high speed diode, and after turning on the high side switch, configuring the power converter such that the current of the power converter flows through a low forward voltage drop diode.

A control circuit and control method for an interleaved switching converter having a first and second interleaved voltage regulating circuit. The control method is: controlling a first switch of the first voltage regulating circuit operating in quasi-resonant mode, turning ON a second switch of the second voltage regulating circuit after the first switch is turned ON for a half switching period, generating a current sensing signal by detecting a current flowing through the second switch, generating a peak signal, wherein the peak signal is adjusted when a voltage across the second switch is higher than a voltage reference at the time the second switch is turned ON, and turning OFF the second switch when the current sensing signal increases to the peak signal.

A method of controlling charge of a vehicle battery includes: determining, by a control unit, whether a high voltage battery and a low voltage battery are charged in a first charging mode, a second charging mode, or a third charging mode; and charging at least one of the high voltage battery or the low voltage battery by controlling a first full-bridge circuit unit, a second full-bridge circuit unit, and a low voltage direct current (DC) converter unit based on the determined first, second or third charging mode.

A three-phase grid-connected inverter, and a method and a device for controlling the three-phase grid-connected inverter are provided. The method is applied to a three-phase three-leg grid-connected inverter. A structure of the three-phase three-leg grid-connected inverter is improved, so that a filter capacitor (C1, C2, and C3) is connected to a negative electrode of a direct current input bus to form a harmonic bypass circuit. Inverter devices connected in parallel in the system operate stably without increase of inductance of an inductor (L1, L2, L3). In addition, the three-phase three-leg grid-connected inverter according to the present disclosure operates in a discontinuous mode of inductor current (i.sub.L1, i.sub.L2, and i.sub.L3). That is, in the process that a power switch transistor (Q.sub.1, Q.sub.2, Q.sub.3, Q.sub.4, Q.sub.5 and Q.sub.6) on bridge legs is turned on, the inductor current (i.sub.L1, i.sub.L2, and i.sub.L3) drops to zero.