H02M1/096

METHOD FOR STATIC GATE CLAMPING IN MULTI-OUTPUT GATE DRIVER SYSTEMS
20200127552 · 2020-04-23 ·

A multi-output gate driver system comprises a power device having a gate node; a first driver having an input and an output coupled to the gate node; a second driver having an input and an output coupled to the gate node; a first comparator having a first input coupled to the output of the second driver, a second input coupled to a first reference voltage, and an output; a second comparator having a first input coupled to the output of the second driver, a second input coupled to a second reference voltage, and an output; and a logic circuit having an input for receiving a control signal, a first output coupled to the input of the first driver, and a second output coupled to the input of the second driver.

METHOD FOR STATIC GATE CLAMPING IN MULTI-OUTPUT GATE DRIVER SYSTEMS
20200127552 · 2020-04-23 ·

A multi-output gate driver system comprises a power device having a gate node; a first driver having an input and an output coupled to the gate node; a second driver having an input and an output coupled to the gate node; a first comparator having a first input coupled to the output of the second driver, a second input coupled to a first reference voltage, and an output; a second comparator having a first input coupled to the output of the second driver, a second input coupled to a second reference voltage, and an output; and a logic circuit having an input for receiving a control signal, a first output coupled to the input of the first driver, and a second output coupled to the input of the second driver.

Electrical assembly and measurement circuit and method for monitoring a component thereof

A measuring method is provided for monitoring a component of an electrical assembly, in which the voltage across at least one component of the electrical assembly and a current through the component are measured, and in which, from measurement values for the voltage and the current, a resistance value of the component is determined. The voltage and the current are measured in successive switching periods of a periodic switching signal of the electrical assembly, and the resistance value is determined based on the measurement values for voltage and current from the successive switching periods. A measuring circuit for monitoring a component of an electrical assembly is provided with an analog/digital converter. An electrical assembly, in particular a switching power supply, having such a measuring circuit is also provided.

Electrical assembly and measurement circuit and method for monitoring a component thereof

A measuring method is provided for monitoring a component of an electrical assembly, in which the voltage across at least one component of the electrical assembly and a current through the component are measured, and in which, from measurement values for the voltage and the current, a resistance value of the component is determined. The voltage and the current are measured in successive switching periods of a periodic switching signal of the electrical assembly, and the resistance value is determined based on the measurement values for voltage and current from the successive switching periods. A measuring circuit for monitoring a component of an electrical assembly is provided with an analog/digital converter. An electrical assembly, in particular a switching power supply, having such a measuring circuit is also provided.

Power supply apparatus

An abnormality determiner turns OFF a third switch and controls a converter controller to stop operating in a case where a voltage value detected by a voltage detector during a normal mode exceeds a first threshold value. The abnormality determiner determines that a first switch has an abnormality in a case where the voltage value exceeds a second threshold value in a state where the converter controller is stopped. The abnormality determiner controls the converter controller to operate in a case where the voltage value is equal to or smaller than the second threshold value in a state where the converter controller is stopped. The abnormality determiner determines that the converter controller has an abnormality in a case where the voltage value exceeds a third threshold value in a state where the converter controller is operated.

Power supply apparatus

An abnormality determiner turns OFF a third switch and controls a converter controller to stop operating in a case where a voltage value detected by a voltage detector during a normal mode exceeds a first threshold value. The abnormality determiner determines that a first switch has an abnormality in a case where the voltage value exceeds a second threshold value in a state where the converter controller is stopped. The abnormality determiner controls the converter controller to operate in a case where the voltage value is equal to or smaller than the second threshold value in a state where the converter controller is stopped. The abnormality determiner determines that the converter controller has an abnormality in a case where the voltage value exceeds a third threshold value in a state where the converter controller is operated.

SERIAL PWM SIGNAL DECODING CIRCUIT AND METHOD BASED ON A CAPACITOR CHARGE-DISCHARGE STRUCTURE AND METHOD THEREOF

The present disclosure provides a serial PWM signal decoding circuit based on a capacitor charge-discharge structure, comprising: a timing logic generation circuit configured to receive, at an input end of the timing logic generation circuit, a PWM differential signal, and generate a timing logic signal; and at least two capacitor charge-discharge decoding modules, each of the at least two capacitor charge-discharge decoding modules has an input end connected to an output end of the timing logic generation circuit, and is configured to perform charging and discharging based on the timing logic signal. During a decoding process, a voltage at a charge-discharge capacitor of the capacitor charge-discharge decoding module before the charging and discharging is a common mode voltage VCM, and a voltage at a charge-discharge node after the end of the charging and discharging is a voltage V.sub.C, and the PWM signal is decoded by identify the PWM signal through determining a polarity of a voltage difference between the common mode voltage VCM and the voltage V.sub.C. The present disclosure further provides a method of decoding based on a capacitor charge-discharge structure. The present disclosure provides a simple structure and does not need synchronize code streams, thus avoiding the use of a complicated CDR and an oversampling structure, realizing the decoding of PWM signals at different rates, increasing the efficiency of signal transmission and lowering the power consumption.

SERIAL PWM SIGNAL DECODING CIRCUIT AND METHOD BASED ON A CAPACITOR CHARGE-DISCHARGE STRUCTURE AND METHOD THEREOF

The present disclosure provides a serial PWM signal decoding circuit based on a capacitor charge-discharge structure, comprising: a timing logic generation circuit configured to receive, at an input end of the timing logic generation circuit, a PWM differential signal, and generate a timing logic signal; and at least two capacitor charge-discharge decoding modules, each of the at least two capacitor charge-discharge decoding modules has an input end connected to an output end of the timing logic generation circuit, and is configured to perform charging and discharging based on the timing logic signal. During a decoding process, a voltage at a charge-discharge capacitor of the capacitor charge-discharge decoding module before the charging and discharging is a common mode voltage VCM, and a voltage at a charge-discharge node after the end of the charging and discharging is a voltage V.sub.C, and the PWM signal is decoded by identify the PWM signal through determining a polarity of a voltage difference between the common mode voltage VCM and the voltage V.sub.C. The present disclosure further provides a method of decoding based on a capacitor charge-discharge structure. The present disclosure provides a simple structure and does not need synchronize code streams, thus avoiding the use of a complicated CDR and an oversampling structure, realizing the decoding of PWM signals at different rates, increasing the efficiency of signal transmission and lowering the power consumption.

Power transistor with distributed gate
10587194 · 2020-03-10 · ·

An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.

Power transistor with distributed gate
10587194 · 2020-03-10 · ·

An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.