A power factor correction circuit includes an input power source, a first bridge arm, a second bridge arm, an output capacitor and an active clamp unit. The first bridge arm includes a first switch and a second switch in series. The second bridge arm includes a third switch and a fourth switch in series. The active clamp unit includes a second inductor, a clamp capacitor and a fifth switch. The power factor correction circuit may realize the ZVS function of the first switch and the second switch by the collaboration of the active clamp unit and the conduction/non-conducting state of the first switch, the second switch, the third switch and the fourth switch.

An inverter drive device for driving a semiconductor switching element that controls an output current of an inverter. An inverter drive device includes a drive circuit configured to apply a drive voltage to the semiconductor switching element, to thereby turn the semiconductor switching element on and off, the turning off of the semiconductor switching element causing a counter electromotive force to be generated therein, a clamping diode configured to clamp a voltage of the generated counter electromotive force, a voltage dividing resistor configured to detect a voltage that is proportional to a current flowing through the clamping diode, and an auxiliary drive circuit configured to generate a control voltage in accordance with the voltage detected by the voltage dividing resistor, and to apply the control voltage to the semiconductor switching element, to thereby turn the semiconductor switching element on.

The present invention generally relates to a switching cell for a phase leg of a power converter and a method of controlling a power converter to drive a load, and more particularly to a plurality of such switching cells, a phase arm for a power converter, a power converter phase leg, to a power converter for driving a load, and methods of making a power converter. A switching cell for a phase leg of a power converter may comprise: a power switch for conducting a current for driving a load; a commutation path coupled in parallel with the power switch, the commutation path comprising a cell capacitor and an auxiliary switch coupled in series, the auxiliary switch configured to allow control of a conduction state of the commutation path; and a cell inductor coupled to a coupling of the power switch and the commutation path, wherein the switching cell comprises at least one control input line for receiving a control signal, the at least one control input line configured to drive a control terminal of the power switch and a control terminal of the auxiliary switch.

A flyback power-converting device includes a transformer circuit, a clamp damping circuit, a first switch, a voltage-reducing circuit and a second switch. The clamp damping circuit and the first switch are coupled to the transformer circuit. The voltage-reducing circuit and the second switch are coupled in series between the clamp damping circuit and the transformer circuit. Through switching of the first switch, the transformer circuit converts an input power to generate a first converted voltage and to enable the clamp damping circuit to store an inductive energy. In addition, when the second switch is turned on, the clamp damping circuit releases the inductive energy to the transformer circuit via the voltage-reducing circuit, so that the transformer circuit generates a second converted voltage according to the inductive energy.

An overvoltage absorption circuit and a single-phase HERIC topology are provided. The overvoltage absorption circuit is applicable to the single-phase HERIC topology, and includes a clamping capacitor, an absorption resistor, a first diode, and a second diode. One terminal of the clamping capacitor and one terminal of the absorption resistor are each connected to collectors of two cross transistors in the single-phase HERIC topology. The other terminal of the clamping capacitor and the other terminal of the absorption resistor are each connected to the anodes of the first diode and the second diode. The cathode of the first diode is connected to the emitter of one of the two cross transistors. The cathode of the second diode is connected to the emitter of the other of the two cross transistors.

A radiation tolerant gate driver for power converters with active-clamp reset and active-driven synchronous rectification uses integrated logic drivers for high efficiency and wide input range. A keep alive circuit prevents power train transistors from remaining on for extended durations after a transient or an undervoltage lockout (UVLO) event. Each of the integrated logic drivers includes two gate driver circuits, where one of the gate driver circuits uses the output of the other of the gate driver circuits as input per a logic table of the integrated logic driver, to ensure no shoot-through when the respective power train transistors are turned on and off.

A power conversion system according to the present disclosure includes a first circuit, a second circuit, and a third circuit. A first internal terminal, a second internal terminal, and a third internal terminal are electrically connected to the same connection unit. The third circuit provides an output voltage across a secondary winding of a transformer via a switching element and the transformer. The secondary winding is electrically connected to the third internal terminal. The output voltage has a waveform including a rising range in which the output voltage changes from a first potential to a second potential, a falling range in which the output voltage changes from the second potential to the first potential, and a flat range in which the output voltage is maintained at either the first potential or the second potential.

An apparatus including: a switching converter having a main switch configured to provide power to a transformer, an auxiliary switch configured to provide a release path for leakage inductance energy of the transformer, and a clamp capacitor coupled in series with the auxiliary switch; and a control circuit configured to control the main switch to be off and the auxiliary switch to operate to discharge the clamp capacitor when in an over-voltage protection mode. A method of controlling the switching converter can include: controlling the main switch to be off; and controlling the auxiliary switch to operate to discharge the clamp capacitor when in an over-voltage protection mode.

An active voltage snubber includes a ground terminal and an input terminal, and a snubber capacitor. A snubbing-activation device is designed to connect the input terminal to a second terminal of the snubber capacitor with a view to charging the snubber capacitor via this second terminal. Also included is a discharging switch for discharging the snubber capacitor, and a control circuit for controlling the discharging switch, which is designed to close the discharging switch so as to make the snubber capacitor discharge via its second terminal through the discharging switch. The control circuit is powered electrically by the snubber capacitor by being connected to the second terminal of the snubber capacitor so as to receive current from the snubber capacitor.

A power semiconductor circuit is provided for clamping the voltage across the circuit when a power semiconductor switch is opened (i.e., turned off). The circuit may include a first surge arrester and a first semiconductor switch coupled in parallel with the power semiconductor switch. The first semiconductor switch is coupled in series with the first surge arrester. A second surge arrester may be coupled to the gate of the first semiconductor switch to control current flow through the first semiconductor switch and the first surge arrester.