A power conversion circuit includes an N-level PWM power converter and a switching capacitor power converter. The N-level PWM power converter includes shared switches shared with the switching capacitor power converter, and PWM switches. In an N-level PWM mode, the shared switches and the PWM switches periodically switch an inductor and a capacitor, to execute power conversion between a first power and a second power by N-level PWM switching operation. The switching capacitor power converter includes the shared switches and auxiliary switches. In a capacitive conversion mode, the shared switches and the auxiliary switches periodically switch the capacitor, to execute power conversion between the first power and the second power by capacitive power conversion operation. In the capacitive conversion mode, a portion of the plural PWM switches are always OFF such that one end of the inductor is floating.

Disclosed is an overcurrent detecting circuit configured to detect an overcurrent of a current output from a switched capacitor converter including a plurality of capacitors and a plurality of switching elements, the overcurrent detecting circuit including a first application terminal configured such that an input voltage of the switched capacitor converter is applied to the first application terminal, a second application terminal configured such that an output voltage of the switched capacitor converter is applied to the second application terminal, and a detecting unit configured to detect the overcurrent according to a difference between the output voltage and an integral multiple or an integral submultiple of the input voltage.

Disclosed is an overcurrent detecting circuit configured to detect an overcurrent of a current output from a switched capacitor converter including a plurality of capacitors and a plurality of switching elements, the overcurrent detecting circuit including a first application terminal configured such that an input voltage of the switched capacitor converter is applied to the first application terminal, a second application terminal configured such that an output voltage of the switched capacitor converter is applied to the second application terminal, and a detecting unit configured to detect the overcurrent according to a difference between the output voltage and an integral multiple or an integral submultiple of the input voltage.

An apparatus such as a power converter includes a first flying capacitor operative to store a first flying capacitor voltage; a second flying capacitor operative to store a second flying capacitor voltage; an inductor providing coupling between the first flying capacitor and the second flying capacitor; and a network of switches operative to, in accordance with control signals, produce an output voltage via the first flying capacitor voltage and the second flying capacitor voltage.

A power converter converts a medium-voltage output from a solar module to an appropriate voltage to power a solar tracker system. The power converter includes a voltage divider having at least two legs, a first semiconductor switch subassembly coupled in parallel with a first leg of the voltage divider, and a second semiconductor switch subassembly coupled in parallel with a second leg of the voltage divider. The power converter may be a unidirectional or a bidirectional power converter. In implementations, the signals for driving the semiconductor switches of the first and second semiconductor switch subassemblies may be shifted out of phase from each other. In implementations, if the bus voltages to the semiconductor switches are not balanced, the pulse width of the driving signal of the semiconductor switch supplied with the higher bus voltage is decreased for at least one cycle.

A power supply system includes an AC input device/DC input device connector having an AC input device sub-connector and a DC input device sub-connector, an AC power supply subsystem configured to perform first power operation(s) on first power received from the AC input device sub-connector, and a DC power supply subsystem configured to perform second power operation(s) on second power received from the DC input device sub-connector. When an AC input device is coupled to the AC input device sub-connector, an AC-or-DC power supply subsystem in the power supply system performs third power operation(s) on the first power received from the AC power supply subsystem, and supplies it to component(s). When the DC input device is coupled to the DC input device sub-connector, the AC-or-DC power supply subsystem performs the third power operation(s) on the second power received from the DC power supply subsystem, and supplies it to component(s).

A power supply system includes an AC input device/DC input device connector having an AC input device sub-connector and a DC input device sub-connector, an AC power supply subsystem configured to perform first power operation(s) on first power received from the AC input device sub-connector, and a DC power supply subsystem configured to perform second power operation(s) on second power received from the DC input device sub-connector. When an AC input device is coupled to the AC input device sub-connector, an AC-or-DC power supply subsystem in the power supply system performs third power operation(s) on the first power received from the AC power supply subsystem, and supplies it to component(s). When the DC input device is coupled to the DC input device sub-connector, the AC-or-DC power supply subsystem performs the third power operation(s) on the second power received from the DC power supply subsystem, and supplies it to component(s).

The invention relates to a circuit comprising a voltage reference (R) and a low-pass filter (F) electrically connected to the voltage reference (R). The filter (F) comprises a stage formed by a stage resistance (Re) electrically connected at a midpoint (M) to a stage capacitor (Ce), the stage resistance (Re) and the stage capacitor (Ce) at least partially defining a time constant of the filter and the midpoint (M) carrying the filtered reference voltage (V′ref). The circuit also comprises a transistor (T) and a control circuit (Cde) of the gate of the transistor (T) configured to bias the transistor (T) in conduction when the circuit (1) is turned on, the on-state resistance of the transistor (T) combining with the stage capacitor (Ce) to raise the filtered reference voltage (V′ref) with a settling time constant lower than the filter time constant.

A voltage dividing capacitor circuit includes a first capacitor voltage divider and a second capacitor voltage divider. The first capacitor voltage divider is connected to a second voltage node, the first capacitor voltage divider includes a first flying capacitor and a plurality of first switches, the second voltage node coupled to a second load capacitor, the plurality of first switches connected in series between a first voltage node and a ground node, the first voltage node coupled to a first load capacitor, and the ground node coupled to a ground voltage. The second capacitor voltage divider is connected between the first voltage node and the second voltage node, and includes a second flying capacitor and a plurality of second switches, the plurality of second switches connected in series between the first voltage node and the second voltage node.

A power control circuit comprising a power supply and a load, the load being synthesized from an impedance synthesizer comprising two-terminal impedance elements connected in series and grouped in impedance modules. The impedance elements in each impedance module are of equal value, while those between the modules bear ratios uniquely defined according to the numbers of impedance elements in the impedance modules. A number of switches associated with said impedance elements short out a selected number of the impedance elements under the control of a first analog signal which may be preprocessed by an analytic function. The analog signal is converted to digital signals by an analog-to-digital converter, then level shifted to control the switches associated with the impedance elements, whereby the amount of power delivered to the load is controllable by the first analog signal. Pulse-width-modulation is deployed to further control the power by a second analog signal, with additional benefit of overload protection.