The present disclosure relates to an L-shaped DC/DC converter circuit with multiple configurations for obtaining a boost converter or a buck converter, allowing the voltage and capacity of capacitors, the values of average voltage supported by diodes and transistors, and the levels and ripple of the current circulating through same, to be reduced. The converter, in its most basic configuration, comprises a coil; a first capacitor in series with a third capacitor, wherein the first capacitor is connected to a first voltage, and wherein the first capacitor in series with the third capacitor are connected to a second voltage; a first transistor connected in series to a third transistor, both being connected to the second voltage. The interconnection between the first transistor and the third transistor is connected to the interconnection between the first capacitor and the third capacitor, with the coil interposed.

The present disclosure relates to an L-shaped DC/DC converter circuit with multiple configurations for obtaining a boost converter or a buck converter, allowing the voltage and capacity of capacitors, the values of average voltage supported by diodes and transistors, and the levels and ripple of the current circulating through same, to be reduced. The converter, in its most basic configuration, comprises a coil; a first capacitor in series with a third capacitor, wherein the first capacitor is connected to a first voltage, and wherein the first capacitor in series with the third capacitor are connected to a second voltage; a first transistor connected in series to a third transistor, both being connected to the second voltage. The interconnection between the first transistor and the third transistor is connected to the interconnection between the first capacitor and the third capacitor, with the coil interposed.

A voltage dividing capacitor circuit includes a first capacitor voltage divider and a second capacitor voltage divider. The first capacitor voltage divider is connected to a second voltage node, the first capacitor voltage divider includes a first flying capacitor and a plurality of first switches, the second voltage node coupled to a second load capacitor, the plurality of first switches connected in series between a first voltage node and a ground node, the first voltage node coupled to a first load capacitor, and the ground node coupled to a ground voltage. The second capacitor voltage divider is connected between the first voltage node and the second voltage node, and includes a second flying capacitor and a plurality of second switches, the plurality of second switches connected in series between the first voltage node and the second voltage node.

A digital isolator provided includes a pair of transceiver circuits and a control circuit. Each transceiver circuit includes a transmitter circuit, a receiver circuit, and a DC isolation circuit. When the control circuit controls one of the pair of transceiver circuits to operate in a transmitting mode and the other of the pair of transceiver circuits to operate in a receiving mode, the transmitting circuit of the transceiver circuit operating in the transmitting mode receives a square wave signal to generate a pair of differential square wave signals, the connected DC isolation circuits receive the pair of differential square wave signals to generate a pair of differential coupling signals, and the transceiver circuit operating in the receiving mode uses the pair of differential coupling signals to output the square wave signal through the design of a pair of feedback voltage divider circuits and a differential comparison circuit included therein.

A digital isolator provided includes a pair of transceiver circuits and a control circuit. Each transceiver circuit includes a transmitter circuit, a receiver circuit, and a DC isolation circuit. When the control circuit controls one of the pair of transceiver circuits to operate in a transmitting mode and the other of the pair of transceiver circuits to operate in a receiving mode, the transmitting circuit of the transceiver circuit operating in the transmitting mode receives a square wave signal to generate a pair of differential square wave signals, the connected DC isolation circuits receive the pair of differential square wave signals to generate a pair of differential coupling signals, and the transceiver circuit operating in the receiving mode uses the pair of differential coupling signals to output the square wave signal through the design of a pair of feedback voltage divider circuits and a differential comparison circuit included therein.

Described are circuits and techniques to increase the efficiency of radio-frequency (rf) amplifiers including rf power amplifiers (PAs) through “supply modulation” (also referred to as “drain modulation” or “collector modulation”), in which supply voltages provided to rf amplifiers is adjusted dynamically (“modulated”) overtime depending upon the rf signal being synthesized. For the largest efficiency improvements, a supply voltage can be adjusted among discrete voltage levels or continuously on a short time scale. The supply voltages (or voltage levels) provided to an rf amplifier may also be adapted to accommodate longer-term changes in desired rf envelope such as associated with adapting transmitter output strength to minimize errors in data transfer, for rf “traffic” variations.

A DC-to-DC converter includes a first capacitor, first to fourth switches connected in series between first and second electrodes of the first capacitor, a second capacitor connected to a connection node of the first switch and the second switch and a connection node of the third switch and the fourth switch, an inductor connected to a connection node of the second switch and the third switch, and a controller that performs PWM control. In a case where a failure occurs in the second capacitor, the DC-to-DC converter performs PWM control such that the first switch and the second switch enter the same state and the third switch and the fourth switch enter the same state on the basis of a result of comparison between a first detection voltage that is a measured output voltage and a target output voltage of the DC-to-DC converter.

A DC-to-DC converter includes a first capacitor, first to fourth switches connected in series between first and second electrodes of the first capacitor, a second capacitor connected to a connection node of the first switch and the second switch and a connection node of the third switch and the fourth switch, an inductor connected to a connection node of the second switch and the third switch, and a controller that performs PWM control. In a case where a failure occurs in the second capacitor, the DC-to-DC converter performs PWM control such that the first switch and the second switch enter the same state and the third switch and the fourth switch enter the same state on the basis of a result of comparison between a first detection voltage that is a measured output voltage and a target output voltage of the DC-to-DC converter.

There is provided a power supply device 100 for switching power to an output line 150 between a first power supply 120 and a parallel second power supply 122. The power supply device 100 comprises: a first converter 130 connected to the first power supply 120 and configured to output a first voltage in a first predetermined range; and a second converter 132 connected to the second power supply 122 and configured to output a second voltage in a second predetermined range. The outputs of the first and second converters 130, 132 are connected together on the output line 150, and the first and second converters 130, 132 are arranged to maintain a voltage on the output line 150 within a third predetermined range.

There is provided a power supply device 100 for switching power to an output line 150 between a first power supply 120 and a parallel second power supply 122. The power supply device 100 comprises: a first converter 130 connected to the first power supply 120 and configured to output a first voltage in a first predetermined range; and a second converter 132 connected to the second power supply 122 and configured to output a second voltage in a second predetermined range. The outputs of the first and second converters 130, 132 are connected together on the output line 150, and the first and second converters 130, 132 are arranged to maintain a voltage on the output line 150 within a third predetermined range.