A motor includes a first inverter electrically connected to a first end of a winding of each phase, and a second inverter electrically connected to a second end of the winding of each phase. Each of the first and second inverters includes low-side switching elements and high-side switching elements. FETs of the first inverter are electrically connected to a first end of a U-phase winding. FETs of the second inverter are electrically connected to a second end of the U-phase winding. At least a portion of a current flowing from one of the FETs of the first inverter to the U-phase winding flows to one of the FETs of the second inverter. One of the FETs of the first inverter and one of the FETs of the second inverter are adjacent to each other.

The waveform generator (10) comprises a switch (13). The waveform generator (10) comprises a transformer (15) having a primary side circuit and a secondary side circuit. The primary side circuit has a first terminal arranged to be conductively coupled to a DC voltage source, and a second terminal conductively coupled to the switch (13). The waveform generator (10) further comprises a controller (11) arranged to supply a drive signal to the switch for switching the switch between on and off states. The controller (11) is arranged to adjust the frequency of the drive signal so as to control at least one of the peak voltage and the duty cycle of a waveform generated by the waveform generator (10). The frequency of the drive signal may be adjusted as the voltage level of the DC voltage source remains constant. The frequency of the drive signal may be adjusted in response to a change in the voltage level of the DC voltage source.

An AC/DC Switching Mode Power Supply (SMPS) comprises a PFC stage, an isolated LLC DC/DC converter stage, and a control circuit that provides feedback/control signals to PFC and LLC controllers, to enable a plurality of operating modes, dependent on a sensed peak AC input voltage and required output voltage Vo. The PFC provides a first DC bus voltage Vdc (e.g. 200V) for low line AC input and a second DC bus voltage (e.g. 400V) for high line or universal AC input. A multi-mode LLC converter is operable in a half-bridge mode or a full-bridge mode. For low line AC input, output voltage Vo, and PFC output Vdc, the LLC operates in full-bridge mode; for high line input, output voltage Vo and PFC output 2×Vdc, the LLC operates in half-bridge mode; for universal AC input, output voltage 2×Vo, and PFC output 2×Vdc, the LLC operates in full-bridge mode.

A power supply device, provided with: a battery; a capacitor connected in parallel to a load; and a main switching unit capable of switching between a state of connection and a state of disconnection between the battery and the capacitor. The power supply device is provided with a precharge circuit for reducing the current from the battery and supplying the current to the capacitor. A control unit of the power supply device first supplies electric power from the precharge circuit to the capacitor, then sets the main switching unit from a state of disconnection to a state of connection, and stops the supply of electric power from the precharge circuit while the state of connection is established.

An inverter includes a DC/DC converter which converts a direct current received from a DC voltage source into an intermediate circuit voltage of an intermediate circuit, a DC/AC converter which converts the intermediate circuit voltage into an AC voltage, and a monitoring unit which monitors capacitors of the intermediate circuit for protection against overvoltages. If an overvoltage occurs at one of the capacitors of the intermediate circuit the overvoltage unit decouples the DC voltage source from the intermediate circuit by actuating the DC/DC converter.

An inverter includes a DC/DC converter which converts a direct current received from a DC voltage source into an intermediate circuit voltage of an intermediate circuit, a DC/AC converter which converts the intermediate circuit voltage into an AC voltage, and a monitoring unit which monitors capacitors of the intermediate circuit for protection against overvoltages. If an overvoltage occurs at one of the capacitors of the intermediate circuit the overvoltage unit decouples the DC voltage source from the intermediate circuit by actuating the DC/DC converter.

A shared base plate includes a plurality of base portions to which a plurality of electronic components including semiconductor switching elements are to be mounted, and a terminal formed portion formed so as to extend from the base portion to the outer side. The terminal formed portion includes a discrimination terminal which is used as a terminal in one of a first semiconductor module and a second semiconductor module and which is not used as a terminal in the other one. If the discrimination terminal that is not used as a terminal is cut to be short, it becomes possible to easily discriminate the semiconductor module from another semiconductor module having the shared base plate by outer appearances.

A shared base plate includes a plurality of base portions to which a plurality of electronic components including semiconductor switching elements are to be mounted, and a terminal formed portion formed so as to extend from the base portion to the outer side. The terminal formed portion includes a discrimination terminal which is used as a terminal in one of a first semiconductor module and a second semiconductor module and which is not used as a terminal in the other one. If the discrimination terminal that is not used as a terminal is cut to be short, it becomes possible to easily discriminate the semiconductor module from another semiconductor module having the shared base plate by outer appearances.

A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.

A quasi-resonant auto-tuning controller includes a zero-voltage crossing detection circuit and a valley tuning finite-state machine having a look-up table. The zero-voltage crossing detection circuit receives a reference voltage and receives an auxiliary signal from an auxiliary winding. The zero-voltage crossing detection circuit produces a comparison signal having pulses when the auxiliary signal is less than the reference voltage. The valley tuning finite-state machine produces a divided pulse width based on the comparison signal, stores the divided pulse width of each pulse in the look-up table, determines, from the comparison signal, that the auxiliary signal is less than the reference voltage, waits a time period corresponding to the divided pulse width stored in the look-up table if the auxiliary signal is less than the reference voltage, and produces a valley point signal after waiting the time period.