A wireless communication apparatus includes an oscillator circuit configured to generate an oscillation signal corresponding to an oscillation frequency determined by an antenna, and a bias generator circuit configured to reconfigure an operation region mode of a transistor included in the oscillator circuit by adjusting a bias signal in response to an enable signal.

The present invention concerns an electronic oscillator comprising: an LC resonant circuit comprising an inductive component and a capacitive component, the LC resonant circuit being connected to a first reference voltage node and to an oscillator output node; a first transistor connected to the oscillator output node and arranged to periodically operate in a conducting state and a non-conducting state; and a phase shift circuit. A phase shift circuit output is connected to the first transistor, while a phase shift circuit input is connected by a first feedback circuit to the oscillator output node. The phase shift circuit comprises a signal phase shifter for shifting the phase of a first feedback signal from the first feedback circuit by substantially 180 degrees. The phase shift circuit further comprises a signal adder for adding a first signal from the signal phase shifter and a second signal to obtain a summed signal; and a second transistor connected to the signal adder for mirroring the summed signal to the oscillator output node through the first transistor.

Certain aspects of the disclosure are directed to electrostatic discharge protection of an integrated circuit clock. According to a specific example, circuitry includes a direct-current power supply, a voltage-controlled oscillation (VCO) circuit, an electrostatic protection circuit, and a voltage regulator. The VCO circuit has an oscillation frequency and includes an amplification circuit and capacitance circuitry. The electrostatic protection circuit is arranged to connect power to the VCO circuit while reducing variation in the oscillation frequency of the VCO circuit resulting from electrostatic energy. The voltage regulator is connected between the direct-current power supply and a power supply connection at which the direct-current power is connected to the VCO, and is configured to mitigate an imbalance of electric charges from adversely altering a tuning capacitance of the VCO established by the capacitance circuitry.

A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.

Systems and methods are provided in which a voltage-controlled oscillator for a radio transmitter includes a LC tank circuit, and a muting circuit. The LC tank circuit includes an inductive element and a capacitive element; wherein the inductive element of the LC tank circuit includes the antenna of the transmitter. The muting circuit can include a variable resistor connected in parallel with the LC tank circuit.

A voltage-controlled oscillator for generating oscillation signals at two output terminals includes an inductor coupled between the two output terminals, a capacitor coupled between the two output terminals, two P-type transistors, coupled between a supply voltage and the two output terminals, two N-type transistors coupled between a ground voltage and the two output terminals, and a control circuit. The control circuit is coupled to the inductor, and is arranged to control a current flowing through the two P-type transistors and the inductor by controlling a voltage of the inductor.

An integrated clock generator includes a tunable LC oscillator, a tunable frequency synthesizer, and a processor. The tunable LC oscillator has an input for receiving an oscillator control signal, and an output for providing an oscillator clock signal. The tunable frequency synthesizer has a clock input coupled to the output of the tunable LC oscillator, a control input for receiving a synthesizer control signal, and an output for providing a clock output signal. The processor has an input for receiving a data input signal, a first output for providing the oscillator control signal, and a second output for providing the synthesizer control signal. The processor provides the oscillator control signal and the synthesizer control signal such that the tunable frequency synthesizer generates the output clock signal at a frequency indicated by the data input signal, and provides the synthesizer control signal further in response to a dynamic condition.

One or more embodiments of current source circuits may include: a first current source that generates a first current dependent on a threshold value of a MOSFET; a second current source that generates a second current dependent on a voltage in a forward direction of a p-n junction; a first resistor that produces a first voltage based on the first current and the second current; a second resistor that produces a second voltage based on the second current; and an output MOSFET that produces an output current based on a sum of the first voltage and the second voltage.

An amplitude limiting oscillation circuit (100) is disclosed. The amplitude limiting oscillation circuit (100) includes: an oscillation circuit (110), configured to generate an oscillation signal; a pulse width modulation circuit (120), configured to generate a pulse width modulation signal according to an amplitude of the oscillation signal; a low pass filtering circuit (130), configured to convert the pulse width modulation signal into a direct current control voltage signal, where the direct current control voltage signal is configured to control a voltage controlled resistance circuit (140); and the voltage controlled resistance circuit (140), configured to change a resistance value of the voltage controlled resistance circuit (140) according to under the direct current control voltage signal, to control the amplitude of the oscillation signal. The amplitude limiting oscillation circuit (100), may improve performance of the amplitude limiting oscillation circuit (100).

A master voltage controlled oscillator (VCO) produces an output signal at an operating frequency of at least 100 gigaHertz (GHz). A buffer VCO injection-locked to an output of the master VCO produces an output signal at the operating frequency with a voltage swing greater than 50% of an output voltage swing of the master VCO output signal. The buffer VCO operates without pulling, and can drive a load of at least three times greater than a nominal load. Phase noise in the output of the buffer VCO is as much as 96 decibels (dB) relative to the carrier (dBc) per Hertz (Hz) at 125 GHz with a 1 megaHertz (MHz) offset.