Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.

A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.

Circuits and processes for locking a voltage-controlled oscillator (VCO) at a high frequency signal are described. A circuit may include a voltage-controlled oscillator configured to generate a high frequency signal based on a control signal, a dummy load parallel to the voltage-controlled oscillator and configured to receive the control signal via a switch, and a digital-to-analog converter coupled to the voltage-controlled oscillator where the control signal is generated based on an output of the digital-to-analog converter.

Certain aspects of the present disclosure generally relate to voltage-controlled oscillators (VCOs) using a lowered or an adjustable negative transconductance (g.sub.m) compared to conventional VCOs. This g.sub.m degeneration technique suppresses the noise injected into an inductor-capacitor (LC) tank of the VCO, thereby providing lower signal-to-noise ratio (SNR) for a given VCO voltage swing, lower power consumption, and decreased phase noise. One example VCO generally includes a resonant tank circuit, an active negative transconductance circuit connected with the resonant tank circuit, and a bias current circuit for sourcing or sinking a bias current through the resonant tank circuit and the active negative transconductance circuit to generate an oscillating signal. The active negative transconductance circuit includes cross-coupled transistors and an impedance connected between the cross-coupled transistors and a reference voltage.

A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.

A master voltage controlled oscillator (VCO) produces an output signal at an operating frequency of at least 100 gigaHertz (GHz). A buffer VCO injection-locked to an output of the master VCO produces an output signal at the operating frequency with a voltage swing greater than 50% of an output voltage swing of the master VCO output signal. The buffer VCO operates without pulling, and can drive a load of at least three times greater than a nominal load. Phase noise in the output of the buffer VCO is as much as 96 decibels (dB) relative to the carrier (dBc) per Hertz (Hz) at 125 GHz with a 1 megaHertz (MHz) offset.

Methods and systems for a distributed transmission line multiplexer for a multi-core multi-mode voltage-controlled oscillator (VCO) may comprise a plurality of voltage controlled oscillators (VCOs) arranged adjacent to each other, where each of the plurality of VCOs are operable to generate an output signal at a configurable frequency, an impedance matching circuit comprising a respective driver and impedance matching elements coupled to each of the plurality of VCOs, and an output device coupled to the impedance matching circuit. The impedance matching elements may include capacitors and inductors. Between each adjacent pair of the respective drivers coupled to each of the plurality of VCOs, the impedance matching elements may include two inductors coupled in series between the drivers and a capacitor coupled to ground and to a common node between the two inductors. Impedance values of the capacitors and inductors may be configurable. The impedance matching elements may include a resistor coupled to a bias voltage VDD and to a common node with a capacitor that is coupled to ground, where the common node is coupled to one of the inductors. The output device may include a prescaler that is an integer or fractional frequency-N divider, or a buffer. The respective drivers coupled to each of the plurality of VCOs may be configured to provide a constant output power no matter which of said plurality of VCOs is enabled.

An oscillator configured to generate an oscillation signal is provided. The oscillator includes a transistor pair and a cross-coupled transistor pair. The transistor pair is coupled to a first current source and has a first transconductance. The first transconductance is changed in response to a current value of the first current source. The cross-coupled transistor pair is coupled to a second current source and has a second transconductance. The second transconductance is changed in response to a current value of second current source. The transistor pair and the cross-coupled transistor pair are mutually coupled by a plurality of inductors. A frequency of the oscillation signal is determined according to the first transconductance and the second transconductance. Furthermore, a clock generator and a method for generating a clock signal thereof are also provided.

A radio frequency (RF) transceiver includes a first oscillator configured to generate a first oscillation frequency associated with an RF signal, a second oscillator configured to generate a second oscillation frequency associated with a clock frequency, a counter configured to generate a counter output signal using the first oscillation frequency and the second oscillation frequency, and a comparer configured to generate a digital output signal associated with the RF signal by comparing an output value of the counter output signal to a reference value.

A master voltage controlled oscillator (VCO) produces an output signal at an operating frequency of at least 100 gigaHertz (GHz). A buffer VCO injection-locked to an output of the master VCO produces an output signal at the operating frequency with a voltage swing greater than 50% of an output voltage swing of the master VCO output signal. The buffer VCO operates without pulling, and can drive a load of at least three times greater than a nominal load. Phase noise in the output of the buffer VCO is as much as 96 decibels (dB) relative to the carrier (dBc) per Hertz (Hz) at 125 GHz with a 1 megaHertz (MHz) offset.