An integrated circuit includes an inverter, first and second capacitors, a resistor, and a transistor. The inverter has an input and an output. The first capacitor is coupled to a ground. The transistor has a first transistor terminal, a second transistor terminal, and a control input. The first transistor terminal is coupled to the first capacitor and the second transistor terminal is coupled to the input of the inverter. The second capacitor is coupled between the output of the inverter and the ground. The resistor is coupled between the output of the inverter and the first transistor terminal.

A clock source includes a comparator having a positive comparator input, a negative comparator input, a proportional to absolute temperature (PTAT) PMOS bias input, a PTAT NMOS bias input, and a comparator output, a resonator element, series and feedback resistors and other passive components coupled between the comparator output and the negative comparator input to generate a signal with approximately constant gain and frequency at the comparator output, and a PTAT bias circuit coupled to the comparator's PTAT PMOS and NMOS bias inputs, and configured to drive the PTAT PMOS bias input and the PTAT NMOS bias input to maintain approximately constant gain and frequency over the operating temperature range of the clock source.

A crystal oscillator includes a piezoelectric substrate, a first electrode, a second electrode, and a support frame. The first electrode includes a first electrode portion disposed on a first surface of the piezoelectric substrate. The second electrode is disposed on a second surface of the piezoelectric substrate opposite to the first surface of the piezoelectric substrate. The support frame is made of a photoresist material, and is disposed on the second surface. The support frame surrounds the second electrode portion. At least a portion of the second extending electrode portion is located outside the support frame. A method for making the crystal oscillator is also provided herein.

A circuit device includes an oscillation circuit configured to generate an oscillation signal, a first pre-driver disposed in a posterior stage of the oscillation circuit, a first output driver disposed in a posterior stage of the first pre-driver, a first regulator configured to supply a first regulated voltage to the first pre-driver, and a second regulator configured to supply a second regulated voltage to the first output driver, wherein the second regulator is shorter in transient response time than the first regulator.

An electrical field detector includes an electromechanical oscillator, part of which is included of a piezoelectric element, a frequency measuring device which is coupled to the oscillator so as to measure the oscillation frequency, and an electrical masking assembly. The electrical masking assembly is arranged close to the piezoelectric element so that, during an use of the detector, the piezoelectric element moves by vibrating relative to the electrical masking assembly. A variable part of the piezoelectric element is thus exposed to the electrical field to be measured. A change in the oscillating frequency then forms an electrical field measurement result.

A timing device includes an oven having a chamber, a crystal oscillator disposed in the chamber that generates a clock signal, and one or more sensors to generate operational characteristic signals indicative of respective operational characteristics of the crystal oscillator or the oven. The timing device includes a plurality of I/O connections and an IC device. The IC device includes processing logic to generate information that indicates how the generated clock signal is to be modified and a modulator coupled to the processing logic and the crystal oscillator. The modulator modulates the generated clock signal in relation to the information to generate a modulated clock signal indicative of the one or more operational characteristics of the crystal oscillator or the oven. The modulator outputs the modulated clock signal over a single one of the plurality of I/O connections.

A timing device includes an oven having a chamber, a crystal oscillator disposed in the chamber that generates a clock signal, and one or more sensors to generate operational characteristic signals indicative of respective operational characteristics of the crystal oscillator or the oven. The timing device includes a plurality of I/O connections and an IC device. The IC device includes processing logic to generate information that indicates how the generated clock signal is to be modified and a modulator coupled to the processing logic and the crystal oscillator. The modulator modulates the generated clock signal in relation to the information to generate a modulated clock signal indicative of the one or more operational characteristics of the crystal oscillator or the oven. The modulator outputs the modulated clock signal over a single one of the plurality of I/O connections.

A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator includes a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may provide an alternating current (AC) ground path for noise on the bias voltage according to a reset pulse, wherein a position of the reset pulse is set by a control voltage on a control terminal of the phase noise reduction circuit.

A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator includes a crystal oscillator core circuit, a bias circuit coupled to an output terminal of the crystal oscillator core circuit, a pulse wave buffer coupled to the output terminal of the crystal oscillator core circuit, and a phase noise reduction circuit coupled to the output terminal of the crystal oscillator core circuit. The crystal oscillator core circuit may generate a sinusoidal wave. The bias circuit may provide a bias voltage of the sinusoidal wave. The pulse wave buffer may generate a pulse wave according to the sinusoidal wave. The phase noise reduction circuit may provide an alternating current (AC) ground path for noise on the bias voltage according to a reset pulse, wherein a position of the reset pulse is set by a control voltage on a control terminal of the phase noise reduction circuit.

Piezoelectric acoustic metamaterial resonators include a piezoelectric substrate having a top surface and a bottom surface and a plurality of magnetostrictive members disposed on the top surface of the piezoelectric substrate and extending along a length of the piezoelectric substrate and spaced across a width of the piezoelectric substrate.