A method for a radar device is described. According to one example implementation, the method comprises generating an RF signal using a voltage-controlled oscillator (VCO), wherein the frequency of the RF signal depends on a first tuning voltage and a second tuning voltage. The method also comprises setting the second tuning voltage using a phase-locked loop coupled to the VCO, with the result that the frequency of the RF signal corresponds to a desired frequency. The first tuning voltage is changed in such a manner that the second tuning voltage set by the phase-locked loop corresponds approximately to a predefined value. Another example implementation relates to a method for a radar device comprising: generating an RF signal using a VCO, wherein the frequency of the RF signal depends on a tuning voltage, setting the tuning voltage using a phase-locked loop coupled to the VCO, with the result that the frequency of the RF signal corresponds to a desired frequency, and determining a differential VCO gain of the VCO. The bandwidth of the phase-locked loop is set on the basis of the determined VCO gain.

A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.

A dual-mode oscillator and a multi-phase oscillator includes a mode switching circuit to switch between two operating modes and obtain oscillation signals having two different bands. The dual-mode oscillator also includes two transformer-coupled oscillators with each having a step-up transformer. The step-up transformer multiplies a drain voltage swing of a first metal oxide semiconductor (MOS) transistor and then injects a voltage signal to a gate of a second MOS transistor to obtain a larger gate voltage swing without increasing a supply voltage of the oscillator. The dual-mode oscillators are coupled through multi-phase coupled circuits to form a Mobius loop.

A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.

Increases of circuit scale and power consumption are suppressed while frequency deviation is kept within a predetermined allowable range. A semiconductor device according to an embodiment includes a variable load capacity circuit including a plurality of load capacity elements coupled in parallel to one end of a crystal resonator and a plurality of switches that are respectively serially coupled to the load capacity elements, and a switch control unit that controls ON/OFF of the switches on the basis of information to be an index of frequency deviation due to temperature change of a frequency signal obtained by oscillating the crystal resonator. The switch control unit changes the number of switches that will be turned ON among the plurality of switches so that an absolute value of the frequency deviation becomes small when the information is not included in a predetermined allowable range.

A biasing circuit for biasing a switching transistor, wherein the switching transistor is used for switching a respective capacitor cell into/out of a capacitor array, wherein the capacitor array comprises one or more such capacitor cells, and wherein the capacitor array is coupled in parallel with a primary inductor to form an inductive/capacitive tank. The biasing circuit comprises a secondary inductor which is inductively coupled to the primary inductor, the secondary inductor configured to provide a bias signal for biasing the switching transistor.

The embodiments of the invention relate to a radio frequency oscillator, the radio frequency oscillator comprising a resonator circuit resonant at an excitation of the resonator circuit in a differential mode and at an excitation of the resonator circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at the excitation in the differential mode, and wherein the resonator circuit has a common mode resonance frequency at the excitation in the common mode, a first excitation circuit configured to excite the resonator circuit in the differential mode to obtain a differential mode oscillator signal oscillating at the differential mode resonance frequency, and a second excitation circuit configured to excite the resonator circuit in the common mode to obtain a common mode oscillator signal oscillating at the common mode resonance frequency.

The invention relates to a resonator circuit, the resonator circuit comprising a transformer comprising a primary winding and a secondary winding, wherein the primary winding is inductively coupled with the secondary winding, a primary capacitor being connected to the primary winding, the primary capacitor and the primary winding forming a primary circuit, and a secondary capacitor being connected to the secondary winding, the secondary capacitor and the secondary winding forming a secondary circuit, wherein the resonator circuit has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.

Methods and devices providing Positive Logic biasing schemes for use in a digitally tuning capacitor in an integrated circuit device are described. The described methods can be used in integrated circuits with stringent requirements in terms of switching time, power handling, noise sensitivity and power consumption. The described devices include DC blocking capacitors arranged in series with stacked switches coupled to RF nodes. The stacked FET switches receive non-negative supply voltages through their drains and gates during the ON and OFF states to adjust the capacitance between the two nodes.

In examples, a voltage-controlled oscillator (VCO) comprises an inductor; a first pair of transistors having first terminals coupled to a voltage source, second terminals coupled to opposing ends of the inductor, and control terminals coupled to opposing ends of the inductor; and a second pair of transistors having first terminals coupled to ground, second terminals coupled to opposing ends of the inductor, and control terminals coupled to opposing ends of the inductor. The VCO also comprises a first transistor coupled to at least one capacitor, the combination of the first transistor and the at least one capacitor coupled to the inductor in parallel. The VCO further comprises second, third, and fourth transistors coupled to a control terminal of the first transistor, the second transistor coupled to the voltage source, the fourth transistor coupled to ground, and the third transistor configured to receive a ramped voltage.