A circuit includes a first signal swapper including a first terminal coupled to a first current source, a second terminal coupled to a second current source, a third terminal coupled to a first current terminal of a first transistor, and a fourth terminal coupled to a third current terminal of a second transistor. The first signal swapper couples the first and second terminals to the third and fourth terminals responsive to a first control signal. First and second switches couple to a gate of the first transistor. The first switch receives the input oscillation signal and the second switch receives a first reference voltage. Third and fourth switches couple to a gate of the second transistor. The third switch receives the input oscillation signal and the fourth switch receives the first reference voltage. A second signal swapper couples to the first signal swapper and to the first and second transistors.

A circuit includes a first signal swapper including a first terminal coupled to a first current source, a second terminal coupled to a second current source, a third terminal coupled to a first current terminal of a first transistor, and a fourth terminal coupled to a third current terminal of a second transistor. The first signal swapper couples the first and second terminals to the third and fourth terminals responsive to a first control signal. First and second switches couple to a gate of the first transistor. The first switch receives the input oscillation signal and the second switch receives a first reference voltage. Third and fourth switches couple to a gate of the second transistor. The third switch receives the input oscillation signal and the fourth switch receives the first reference voltage. A second signal swapper couples to the first signal swapper and to the first and second transistors.

The present disclosure provides an apparatus that includes a first mixer circuit configured to convert between an RF signal and an IF signal based at least in part on an local oscillator (LO) signal. The first mixer circuit is electrically coupled to a first node that is configured to receive the LO signal and a first bias voltage, a second node that is configured to receive the RF signal or the IF signal, and a third node that is configured to provide the IF signal or the RF signal. The apparatus further includes a second mixer circuit electrically coupled to a fourth node configured to receive the LO signal and a second bias voltage, the second node, and the third node. The second bias voltage has a voltage level that is offset from the first bias voltage.

Provided is a phase array receiver. A phase array receiver according to an embodiment of the present invention includes a plurality of antennas, a plurality of low-noise amplifiers, a plurality of phase shifters, a plurality of transconductors, and a frequency mixer. A plurality of low-noise amplifiers amplify RF signals received from the plurality of antennas. The plurality of phase shifters adjusts the phase of the RF signals to generate a plurality of RF phase adjustment signals. The plurality of transconductors convert a plurality of RF phase adjustment signals into a plurality of RF current signals based on the gain control signal. The frequency mixer converts a sum of the plurality of RF current signals into a mixed current signal. According to the inventive concept, the linearity of the signal processing may be improved and the area for the implementation of the phase array receiver may be reduced.

A down-conversion mixer includes a trans conductance circuit and a mixing circuit. The transconductance circuit includes: first and second transconductance units cooperatively converting a differential input voltage signal pair into a differential input current signal pair; and an inductor coupled between the first and second transconductance units. The mixing circuit is coupled to a common node of the first trans conductance unit and the inductor and to a common node of the second transconductance unit and the inductor for receiving the differential input current signal pair therefrom, and mixes the differential input current signal pair with a differential oscillatory voltage signal pair to generate a differential mixed voltage signal pair.

A passive mixer may include an output coupled to a next stage circuit. The output may be coupled to baseband inputs via first switches. The passive mixer may further include a tunable capacitor bank. The tunable capacitor bank may be coupled via second switches to the baseband inputs.

Octagonal phase rotator includes an I-mixer having an I-DAC for steering current between positive and negative phases of an in-phase signal depending on k I-DAC control bits of a control code, a Q-mixer having a Q-DAC for steering current between the positive/negative phases of a quadrature signal depending on k Q-DAC control bits of the code, and an IQ-mixer having n IQ-mixer units each comprising an IQ-DAC for switching a second current unit between the in-phase and quadrature signals, in dependence on a respective bit of n IQ-DAC control bits, and between the positive/negative phases of the in-phase and quadrature signals via I and Q polarity switches respectively of that component. I and Q polarity switches of some different IQ-DAC components switch depending on different I-DAC control bits and Q-DAC control bits respectively. A summation circuit sums weighted output signals from the mixers to produce an output signal of phase.

An integrated amplifier device includes a main amplifier configured to be coupled to an input source. A replica amplifier is coupled to the main amplifier to provide a bias to the main amplifier. A transconductance biasing cell to the main amplifier and the replica amplifier. The transconductance biasing cell is configured to bias both the main amplifier and the replica amplifier. A method of making an integrated amplifier device is also disclosed.

An apparatus and method are provided. The apparatus includes a multiplexer, including first, second, and third inputs, and an output; a first transistor, including a gate connected to the multiplexer, and first and second terminals; a first variable capacitor, including a first terminal connected to the first transistor, a second terminal, and an input; a first inductor, including a first terminal connected to the first transistor, and a second terminal connected to the second terminal of the first variable capacitor; a second transistor, including a gate connected to the output of the multiplexer, a first terminal, and a second terminal connected to the second terminal of the first inductor; a second inductor mutually coupled to the first inductor, including a first and second terminals; and a balun-bias switch, including first, second, and third inputs, and an output connected to the second terminal of the second inductor.

A current mode end-to-end signal path includes, a digital to analog converter (DAC), operating in current mode and an upconverting mixer, operating in current mode and operatively coupled to the DAC, wherein analog inputs and analog outputs of the DAC and the upconverting mixer are represented as currents, and the DAC generates a baseband signal.