H03D7/1441

Subharmonic Detection and Cancelation
20230061672 · 2023-03-02 ·

A circuit for subharmonic detection includes in-phase and quadrature mixers, first and second filters, and a processing circuit. The in-phase mixer has a first mixer input and a first mixer output. The quadrature mixer has a second mixer input and a second mixer output, the first mixer input coupled to the second mixer input. The first filter circuit has a first filter input and a first filter output, the first filter input coupled to the first mixer output. The second filter circuit has a second filter input and a second filter output, the second filter input coupled to the second mixer output. The processing circuit has a first input and a second input, the first input of the processing circuit coupled to the first filter output, the second input of the processing circuit coupled to the second filter output. The processing circuit is configured to detect a subharmonic component of a wave at the first mixer input and the second mixer input using a first direct current (DC) component at the first input of the processing circuit and a second DC component at the second input of the processing circuit.

PASSIVE MIXER, OPERATING METHOD THEREOF, AND DEVICES INCLUDING THE SAME

A method and apparatus for input matching of a passive mixer are disclosed. The passive mixer includes a differential transistor pair including a first transistor and a second transistor, a first inductor having one end connected to the first transistor and another end connected to a ground, a second inductor having one end connected to the second transistor and another end connected to a ground, and a third inductor having one end for receiving a radio frequency (RF) signal and another end connected to a ground.

Subharmonic detection and cancelation

A circuit for subharmonic detection includes in-phase and quadrature mixers, first and second filters, and a processing circuit. The in-phase mixer has a first mixer input and a first mixer output. The quadrature mixer has a second mixer input and a second mixer output, the first mixer input coupled to the second mixer input. The first filter circuit has a first filter input and a first filter output, the first filter input coupled to the first mixer output. The second filter circuit has a second filter input and a second filter output, the second filter input coupled to the second mixer output. The processing circuit has a first input and a second input, the first input of the processing circuit coupled to the first filter output, the second input of the processing circuit coupled to the second filter output. The processing circuit is configured to detect a subharmonic component of a wave at the first mixer input and the second mixer input using a first direct current (DC) component at the first input of the processing circuit and a second DC component at the second input of the processing circuit.

MIXER WITH FILTERING FUNCTION AND METHOD FOR LINEARIZATION OF MIXER
20230107329 · 2023-04-06 · ·

A mixer with a filtering function and a method for linearization of the mixer are provided. The mixer includes at least one amplifier, a transconductance device and a feedback network. The at least one amplifier is configured to output a filtered voltage signal according to an input voltage signal. The transconductance device is coupled to the at least one amplifier, and is configured to generate a filtered current signal according to the filtered voltage signal. The feedback network is coupled between any output terminal among at least one output terminal of the transconductance device and an input terminal of the at least one amplifier. More particularly, the mixer is configured to output a modulated signal according to the filtered current signal.

Buried channel semiconductor device and method for manufacturing the same

A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.

Single stage frequency multiplier using different types of signal mixing modes

A frequency multiplier includes an input section having inputs to receive an input signal having an input frequency, a mixer section, and an output section magnetically coupled to the input section and generating an output signal in response to the input signal. The mixer section may be coupled to the input section by a common mode node forming a path for a common mode current to flow to the mixer section and be magnetically coupled to the common mode node. The input section may generate a signal current, and the mixer section may be magnetically coupled to the input section and be directly capacitively coupled to the input section through a capacitor in a signal current path. The mixer section may have differential inputs capacitively coupled to the input section and also be coupled to the input section through a current path. A current helper section may be coupled to the current path.

APPARATUS AND METHOD FOR PROCESSING OUTPUT SIGNAL OF ANALOG-TO-DIGITAL CONVERTER
20170370766 · 2017-12-28 · ·

According to an aspect of the inventive concept, there is provided an apparatus for processing an output signal of an analog-digital converter, includes: a first frequency conversion unit for converting a frequency of the output signal of the analog-digital converter so that a band where spurious components exist moves to a band where direct current components exist in the output signal of the analog-digital converter; a spurious component blocking unit for eliminating, from an output signal of the first frequency conversion unit, spurious components which have moved to the band where direct current components exist; and a second frequency conversion unit for restoring a frequency of an output signal of the spurious component blocking unit to the original frequency of the output signal of the analog-digital converter.

POWER FACTOR CORRECTION CIRCUIT AND MULTIPLIER
20170373640 · 2017-12-28 ·

The present invention disclosure provides a multiplier and a power factor correction circuit which the multiplier is applied. The multiplier comprises a Gilbert multiplier circuit comprising a first differential input stage, a second differential input stage and an output stage; a first differential voltage conversion circuit; a second differential voltage conversion circuit; and a bias current generating circuit; Wherein said output stage comprises: a current mirror unit comprising two current input terminals and a current output terminal; and a feedback control unit configured to ensure that the current output terminal does not output current when the voltage difference received by the multiplier is zero. The present invention is advantageous in improving the linearity of the multiplier and the accuracy of the output current of the multiplier output current.

CURRENT-MODE SIGNAL PATH OF AN INTEGRATED RADIO FREQUENCY PULSE GENERATOR

One or more systems, devices and/or methods of use provided herein relate to a device that can support a signal generation. A current-mode end-to-end signal path can include a digital to analog converter (DAC) operating in current-mode and an upconverting mixer, operating in current-mode and operatively coupled to the DAC. Analog inputs and outputs of the DAC and upconverting mixer can be represented as currents, and the DAC can generate a baseband signal. The DAC and upconverting mixer each can comprise switching transistors of the same type, such as p-type metal-oxide semiconductor (PMOS) switching transistors. In one or more embodiments, a current source and a diode-connected transistor can be arranged in parallel in the current-mode signal path, and the current source passes a static current, while the diode-connected transistor passes both a static current and a dynamic current.

HARMONIC SUPPRESSING LOCAL OSCILLATOR SIGNAL GENERATION

A transceiver includes local oscillator (LO) signal circuitry configured to output an LO signal having an LO frequency and mixer circuitry configured to input the LO signal and an information signal that encodes communication data and output a shifted signal that corresponds to the information signal shifted to a desired frequency. The LO signal circuitry includes selection circuitry and generation circuitry. The selection circuitry is configured to select a pulse pattern and a gap duration based at least on a target harmonic of the LO frequency to be suppressed. The pulse pattern includes at least two pulses spaced apart by a gap having the gap duration. The generation circuitry is configured to generate an LO signal characterized by the selected pulse pattern and gap duration.