A power amplifier circuit includes a first transistor, a second transistor, a first bias circuit supplying a first bias current or voltage, a second bias circuit supplying a second bias current or voltage, a first inductor, and a first capacitor. A power supply voltage is supplied to a collector of the first transistor, and an emitter thereof is grounded. A radio frequency signal and the first bias current or voltage are supplied to a base of the first transistor. The power supply voltage is supplied to a collector of the second transistor, and an emitter thereof is connected to the collector of the first transistor via the first capacitor and is grounded via the first inductor. The second bias current or voltage is supplied to a base of the second transistor. An amplified radio frequency signal is output from the collector of the second transistor.

An amplifier comprises a common emitter stage coupled to a first and a second input, a common base stage coupled to the common emitter stage and to a first and a second output, and a cancellation path coupled to the common emitter stage and the common base stage and to the first and second outputs. The cancellation path generates a first cancellation signal that is 180 degrees out of phase with a first leakage signal at the first output and a second cancellation signal that is 180 degrees out of phase with a second leakage signal at the second output. The cancellation path comprises a first cancellation transistor coupled to the common emitter stage and the common base stage and to the first output and a second cancellation transistor coupled to the common emitter stage and the common base stage and to the second output.

Aspects of the present disclosure provide a high voltage switch with a fast turn-off. An example power supply circuit generally includes a capacitive element for coupling to a power terminal of an amplifier, a first switch configured to be closed in a first mode and to be open in a second mode, a second switch coupled in series between the first switch and the capacitive element and configured to be closed in the first mode and to be open in the second mode, a first circuit coupled to the first switch and configured to charge the capacitive element and power the amplifier in the first mode, and a buffer circuit having an output coupled to a first node and configured to output a first voltage level greater than half of a second voltage level at a second node.

The invention relates to a sequential broadband Doherty power amplifier with adjustable output power back-off The sequential broadband Doherty power amplifier has at least one input (I.sub.1, I.sub.2; RF.sub.in) for receiving at least one broadband HF signal, wherein the broadband HF signal or broadband HF signals (RF.sub.in) have at least an average power level (carrier/average) and a peak envelope power level (peak), with the average power level and the peak envelope power level defining a crest factor, and a first amplifier branch for amplifying the input signal, with the first amplifier branch providing the amplification substantially for the low and at least the average power level, at least one second amplifier branch for amplifying the input signal, wherein the second amplifier branch substantially provides the amplification for the peak envelope power level, wherein the output of the first amplifier branch is connected via an impedance inverter (Z.sub.T) to the output of the second amplifier branch, the junction (CN) being connected to the load (Z.sub.0) in a substantially directly impedance-matched manner, wherein the first and the second amplifier branch each have a supply voltage, with at least one of the supply voltages being variable as a function of the crest factor of the signal to be amplified, and wherein the signal propagation delay through the at least two amplifier branches is substantially identical in the operating range.

The present invention relates to a multiple output boost DC-DC power converter generating two, three or more separate DC output voltages, and to a multi-level power inverter and an alternating current generator both employing the multiple output boost DC-DC power converter.

A current reuse FET amplifier according to the present invention provides an effect of reducing a variation of bias current of the amplifier, with gate voltage or a resistor for self-biasing of an FET of the amplifier changing in accordance with a process variation of saturation current Idss of the FET.

A wideband self-envelope tracking power amplifier (PA) can use more than a 40-MHz channel bandwidth and improves the envelope bandwidth limit of a self-envelope tracking PAs by ten times. The PA uses an envelope load network, which is based on a general multi-stage low-pass filter. The envelope load network located between an RF choke inductor and main DC power supply provides a dynamically modulated PA supply voltage without using a dedicated envelope amplifier. An input terminal of the network connects a main PA via an RF choke inductor to an input of low-pass filter. An output terminal is connected to the low-pass filter via an envelope choke inductor and to a direct current (DC) power supply. A DC blocker is connected between the output of the low-pass filter and ground by a termination resistor.

A power amplifying circuit includes a switching circuit, an amplifier and a load. The switching circuit receives a first supply voltage and a second supply voltage. When the switching circuit is in a first operation mode, the first supply voltage is provided to a node. When the switching circuit is in a second operation mode, the second supply voltage is provided to the node. The amplifier receives a first input signal and a second input signal, and outputs a first output signal and a second output signal from a first output terminal and a second output signal, respectively. The load includes a first inductor and a second inductor. The first inductor is connected between the node and the first output terminal. The second inductor is connected between the node and the second output terminal.

A dual-mode envelope tracking (ET) power management circuit is provided. An ET amplifier(s) in the dual-mode ET power management circuit is capable of supporting normal-power user equipment (NPUE) mode and high-power user equipment (HPUE) mode. In the NPUE mode, the ET amplifier(s) amplifies a radio frequency (RF) signal(s) to an NPUE voltage based on a supply voltage for transmission in an NPUE output power. In the HPUE mode, the ET amplifier(s) amplifies the RF signal(s) to an HPUE voltage higher than the NPUE voltage based on a boosted supply voltage higher than the supply voltage for transmission in an HPUE output power higher than the NPUE output power. The ET amplifier(s) maintains a constant load line between the NPUE mode and the HPUE mode. By maintaining the constant load line, it is possible to maintain efficiency of the ET amplifier(s) in both the NPUE mode and the HPUE mode.

An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.