H03F1/0277

Source switched split LNA
11005425 · 2021-05-11 · ·

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

POWER CONSUMPTION CONTROL METHOD, POWER CONSUMPTION CONTROL APPARATUS, AND COMPUTER READABLE STORAGE MEDIUM
20210136691 · 2021-05-06 ·

The disclosure provides a power consumption control method, a power consumption control apparatus and a computer readable storage medium. The power consumption control method comprises the following steps: determining signal strength of a received signal; and determining whether the signal strength of the received signal satisfies a preset strength level, and determining whether to adjust a power of a transmitted signal and a power of the received signal according to the preset strength level when the preset strength level is satisfied.

Class-D amplifier with multiple independent output stages
10972061 · 2021-04-06 · ·

A Class-D amplifier having a low power dissipation mode includes first and second independent output stages that receive respective first and second level power supply voltages for driving a load coupled to the amplifier output during respective first and second operating modes. Bypass switches are controllable to disconnect the second output stage from the output during the first operating mode and to connect the second output stage to the output during the second operating mode. The operating modes are selected based on the amplifier output power level. First and second independent pre-driver stages receive the respective first and second level power supply voltages for driving the respective first and second independent output stages. During the second operating mode the first pre-driver stage is placed into a low power dissipation state and during the first operating mode the second pre-driver stage is placed into a low power dissipation state.

Drain switched split amplifier with capacitor switching for noise figure and isolation improvement in split mode
11848648 · 2023-12-19 · ·

An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.

Power amplifier circuit

A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs an output signal; a second amplifier that, in accordance with a control signal, amplifies a signal corresponding to the input signal, generates a signal having an opposite phase to that of the output signal, and adds the signal to the output signal; and a control circuit that supplies the control signal to the second amplifier. The control circuit outputs the control signal so that during operation of the power amplifier circuit in a first power mode, a gain of the second amplifier is not less than zero and less than a predetermined level and during operation in a second power mode lower than the first power mode in output power level, a gain of the second amplifier is not less than the predetermined level and less than a gain of the first amplifier.

Power amplifier
10979008 · 2021-04-13 · ·

A power amplifier includes a first amplifier configured to output a signal based on a difference between an input signal and a feedback signal; a second amplifier that amplifies the power of the signal output from the first amplifier and outputs the amplified signal; a first feedback circuit that feeds the signal output from the second amplifier back to the first amplifier; a third amplifier that amplifies the power of the signal output from the second amplifier and outputs the amplified signal; and a second feedback circuit that feeds the signal output from the third amplifier back to the first amplifier, in which the feedback signal is a signal obtained by combining an output signal of the first feedback circuit with an output signal of the second feedback circuit.

High-Frequency Power Supply Circuit and Determining Method of Constants of Amplifier Circuit
20210111676 · 2021-04-15 ·

A high-frequency power supply circuit includes an amplifier circuit. In the amplifier circuit, one end of an inductor is connected to a direct-current power supply. One end of a switching element is connected to the other end of the inductor. A parallel capacitor is connected in parallel to the switching element. One end of an LC series circuit is connected to the one end of the switching element. A circuit capacitor is connected between the other end of the LC series circuit and the other end of the switching element. The amplifier circuit amplifies a signal having a unique frequency input to a control terminal of the switching element. The amplifier circuit outputs, to a load, a current having the frequency from a connection point between the other end of the LC series circuit and the circuit capacitor.

Envelope tracking circuit and related apparatus
10992264 · 2021-04-27 · ·

An envelope tracking (ET) circuit is provided. In examples discussed herein, the ET circuit can be configured to operate in a fifth-generation (5G) standalone (SA) mode and a 5G non-standalone (NSA) mode. In the SA mode, the ET circuit can enable a first pair of ET power amplifier circuits to amplify a 5G signal based on ET for concurrent transmission in a 5G band(s). In the NSA mode, the ET circuit can enable a second pair of ET power amplifier circuits to amplify an anchor signal and a 5G signal based on ET for concurrent transmission in an anchor band(s) and a 5G band(s), respectively. As such, the ET circuit may be provided in a 5G-enabled wireless communication device (e.g., a 5G-enabled smartphone) to help improve power amplifier linearity and efficiency in both 5G SA and NSA networks.

AUDIO AMPLIFIER ASSEMBLIES, PROCESSES, AND METHODS
20230412134 · 2023-12-21 ·

An amplifier having one or more channels where each channel includes a two half bridges (a master and slave sub-channel). The sub-channels can be connected either in parallel or in a full-bridge configuration via internal switches that route signals to a pair of speaker jacks. One switch in the amplifier has a first position that selectively connects the outputs of the master and slave sub-channel to the same input of the speaker load so that the two sub-channels will drive the speaker load in parallel and a second position where the output of the slave sub-channel is connected to another input of the speaker load so that the master sub-channel and the slave sub-channel will drive the speaker load in a Full-bridge configuration. A second switch has a first position that connects a second input of the speaker load to ground or reference potential of the sub-channels when the speaker load is to be driven in parallel and a second position that is a No-connect position that is used when the speaker load is driven in the Full-bridge configuration and a ground potential is not to be connected to the speaker.

VARIABLE GAIN AMPLIFIER WITH SUBTHRESHOLD BIASING
20230412135 · 2023-12-21 ·

This disclosure is directed to reducing output voltage distortions of Variable Gain Amplifiers (VGAs). A VGA may include a number of amplifiers each providing a portion of a total gain of the VGA. For example, a processing circuit may select one or more of the amplifiers of the VGA to provide the output signal with a selected gain. However, the selected amplifiers may provide amplified signals with one or more distortion signals when receiving a bias voltage. Systems and methods are described to reduce or cancel the distortion signals of the selected amplifiers by providing a subthreshold nonzero bias voltage (e.g., a weak voltage) to the remaining (e.g., non-selected) amplifiers of the VGA. For example, the non-selected amplifiers may receive the weak voltage to provide distortion signals with similar voltage amplitude and out of phase compared to the distortion signals of the selected amplifiers.