A multi-polarization millimeter wave (mmWave) transmitter/receiver (TX/RX) architecture with shared power amplifiers (PAs) is provided. This architecture provides a transceiver which uses shared PAs to reduce the number of TX and PA stages required for multi-polarization transmission in mmWave radio frequency (RF) devices. Embodiments provide an array of switching channels which selectively connect a shared TX and shared PA to two or more antennas in antenna arrays having different polarizations (e.g., a dipole antenna array and a patch antenna array). This approach provides a dual polarization or multi-polarization mmWave transceiver having a reduced number of components which results in a smaller size, improved power efficiency, and improved power heat dissipation.

An integrated circuit device is provided. In some examples, the integrated circuit device includes a first amplifier path, a second amplifier path coupled in parallel with the first amplifier path, a matching network coupled to the first amplifier path and the second amplifier path, and an antenna coupled to the matching network. In some such examples, the first amplifier path includes a first differential power amplifier coupled to the matching network, and the second amplifier path includes a second differential power amplifier coupled to the matching network. The integrated circuit device may further include a controller coupled to selectively enable the first amplifier path to provide a transmitter output power within a first range and to selectively enable the second amplifier path to provide a transmitter output power within a second range that is different from the first range.

The present invention is related to a modular amplifier comprising; an amplifier housing, said housing provided with; an amplifier power input connection, at least one amplifier signal input connection for receiving at least one input signal to be amplified, at least one amplifier signal output connection, for delivering at least one amplified signal; a plurality of amplifier modules, each module comprising: a module power connection coupled to the amplifier power input connection; a module signal input connection; a module signal output connection; amplification hardware, having an amplifying power; a controller, configured for: selectively connecting, based on an algorithm, the at least one amplifier signal input connection to one or more module signal input connections of amplifier modules, for amplifying the at least one input signal to be amplified, and connecting the module signal output connection of said one or more amplifier modules to one or more amplifier signal output connections. The invention is further related to an assembly comprising said amplifiers.

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

A high-frequency signal processing apparatus and a wireless communication apparatus can achieve a decrease in power consumption. For example, when an indicated power level to a high-frequency power amplifier is equal to or greater than a second reference value, envelope tracking is performed by causing a source voltage control circuit to control a high-speed DCDC converter using a detection result of an envelope detecting circuit and causing a bias control circuit to indicate a fixed bias value. The source voltage control circuit and the bias control circuit indicate a source voltage and a bias value decreasing in proportion to a decrease in the indicated power level when the indicated power level is in a range of the second reference value to the first reference value, and indicate a fixed source voltage and a fixed bias value when the indicated power level is less than the first reference value.

Techniques are provided for changing a range of an output circuit with little or no voltage or current glitch. In an example, a method of changing a range of an output signal can include providing a first level of the output signal at an output of a first amplifier based on a received setpoint signal and receiving a range change command. In response to the range change command an input of a second amplifier can be shorted to an output of the second amplifier for a first interval. At the end of the first interval and over a second interval, a first impedance between the input of the second amplifier and the output of the second amplifier can be increased, and a second impedance between the input of the second amplifier and the setpoint signal can be increased.

A signal processing circuit reduces die size and power consumption for each antenna element. The signal processing circuit includes a first set of ports, a third port, a first path, a second path and a first transistor. The first path is between a first port of the first set of ports and the third port. The second path is between a second port of the first set of ports and the third port. The first transistor is coupled between the first path and the second path. The first transistor is configured to receive a control signal to control the first transistor to adjust an impedance between the first path and the second path.

An amplifier having one or more channels where each channel includes a two half bridges (a master and slave sub-channel). The sub-channels can be connected either in parallel or in a full-bridge configuration via internal switches that route signals to a pair of speaker jacks. One switch in the amplifier has a first position that selectively connects the outputs of the master and slave sub-channel to the same input of the speaker load so that the two sub-channels will drive the speaker load in parallel and a second position where the output of the slave sub-channel is connected to another input of the speaker load so that the master sub-channel and the slave sub-channel will drive the speaker load in a Full-bridge configuration. A second switch has a first position that connects a second input of the speaker load to ground or reference potential of the sub-channels when the speaker load is to be driven in parallel and a second position that is a No-connect position that is used when the speaker load is driven in the Full-bridge configuration and a ground potential is not to be connected to the speaker.

Technology for a system operable to regulate an output voltage is described. The system can include an active amplifier configured to amplify an input voltage to produce the output voltage when there is active current consumption at the output voltage of the system. The system can include a standby amplifier configured to switch between amplifying the input voltage for a defined period of time and not amplifying the input voltage for a defined period of time to maintain a desired value for the output voltage of the system.

Wideband signal buffers that can be employed for mmWave (millimeter wave) communication are disclosed. One example signal buffer comprises a variable gain amplifier (VGA) that receives two control words and outputs a feedback signal, wherein both an amplitude and a phase of the feedback signal are based on the two control words and on a bias voltage; and a matching network comprising a first inductor that outputs the bias voltage, a second inductor, and a third inductor that receives the feedback signal from the VGA, and wherein the first, second, and third inductors are magnetically coupled to each other, wherein the signal buffer is configured to receive a RF (Radio Frequency) input and to generate a RF output from the RF input based on a transfer function of the signal buffer, wherein the transfer function is based at least in part on the feedback signal.