H03F1/086

SEMICONDUCTOR DEVICE AND SENSOR SYSTEM

Provided are a semiconductor device and a sensor system capable of achieving improvement of noise resistance. Thus, an output circuit 106a in the semiconductor device includes: input terminals 207n, 207p; and an output terminal 208; an output amplifier 201 connecting the input terminals 207n, 207p to the output terminal 208; a feedback element 203 returning the output terminal 208 to the input terminal 207n; a switching transistor 204; and a resistance element 206. A drain of the switching transistor 204 is connected to the input terminal 207n. The resistance element 206 is provided between a back gate of the switching transistor 204 and a power source Vdd and has impedance of a predetermined value or more for suppressing noise of a predetermined frequency generated at the input terminal 207n.

APPARATUS AND METHOD FOR AMPLIFYING POWER IN TRANSMISSION DEVICE

Disclosed is a 5G (5.sup.th generation) or pre-5G communication system for supporting a data transmission rate higher than that of a 4G (4.sup.th generation) communication system such as long-term evolution (LTE). A transmission device comprises: a first amplification unit having a common source structure, including cross coupled capacitors, and amplifying an input signal; a second amplification unit, having a common gate structure, for amplifying a signal output from the first amplification unit; and a first removal unit which is connected to output terminals of the first amplification unit and input terminals of the second amplification unit and which removes at least one portion of second harmonics. The first removal unit can offset, with respect to a fundamental frequency, at least some of parasitic capacitance generated from the output terminals of the first amplification unit and the input terminals of the second amplification unit, and can ground a signal having a secondary harmonic frequency with respect to the secondary harmonic frequency.

Trans-impedance amplifier for ultrasound device and related apparatus and methods

A variable current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied.

METHOD AND SYSTEM FOR PROCESS AND TEMPERATURE COMPENSATION IN A TRANSIMPEDANCE AMPLIFIER USING A DUAL REPLICA
20210028748 · 2021-01-28 ·

The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.

FREQUENCY COMPENSATION OF AMPLIFIER
20200412303 · 2020-12-31 ·

Disclosed herein are related to an apparatus and a method for implementing an amplifier with an improved stability for feedback operation. In one aspect, the apparatus includes a cascode circuit including a first transistor and a second transistor coupled to each other in series. The cascode circuit may generate a first amplified signal by amplifying an input signal. In one aspect, the apparatus includes an amplifier circuit coupled to an output of the cascode circuit. The amplifier circuit may generate a second amplified signal by amplifying the first amplified signal. In one aspect, the apparatus includes an output circuit coupled to an output of the amplifier circuit. The output circuit may generate an output signal by amplifying the second amplified signal. In one aspect, the apparatus includes a first capacitor disposed across the second transistor, and a second capacitor coupled between the output circuit and the cascode circuit.

OUTPUT POLE-COMPENSATED OPERATIONAL AMPLIFIER
20200395907 · 2020-12-17 ·

A circuit includes a first transconductance stage having an output. The circuit further includes an output transconductance stage, and a first source-degenerated transistor having a first control input and first and second current terminals. The first control input is coupled to the output of the first transconductance stage. The circuit also includes a second transistor having a second control input and third and fourth current terminals. The third current terminal is coupled to the second current terminal and to the output transconductance stage.

AMPLIFIER CIRCUIT, ADDER CIRCUIT, RECEPTION CIRCUIT, AND INTEGRATED CIRCUIT
20200382086 · 2020-12-03 ·

There are an amplifier circuit which includes a first current source that is connected to a power supply line to which a first electric potential is supplied, a differential input circuit that is connected between the first current source and a first node and configured to receive a differential input signal, a second current source that is connected between a power supply line to which a second electric potential is supplied and the first node, and a load circuit that is connected between a power supply line to which the first electric potential is supplied and a second node, and an inductor circuit is further connected between the first node and the second node. Thereby, the amplifier circuit achieves both lower voltage and linearity.

Method and system for process and temperature compensation in a transimpedance amplifier using a dual replica

Methods and systems for process and temperature compensation in a transimpedance amplifier using a dual replica and configurable impedances is disclosed and may include a transimpedance amplifier (TIA) circuit comprising a first TIA, a second TIA, a third TIA, and a control loop. The first TIA comprises a fixed feedback resistance and the second and third TIAs each comprise a configurable feedback impedance. The system may comprise a gain stage with inputs coupled to outputs of the first and second TIAs and with an output coupled to the configurable feedback impedance of the second and third TIAs. The circuit may be operable to configure a gain level of the first TIA based on the fixed feedback resistance and a reference current applied at an input to the first TIA, and configure a gain level of the second and third TIAs based on a control voltage generated by the gain stage.

Transimpedance amplifiers for ultrasonic sensing applications

Various transimpedance amplifier (TIA) arrangements for ultrasonic front-end receivers used in ultrasonic sensing applications are disclosed. An example TIA includes three common-source gain stages in a feedback loop with a common-gate stage. In some aspects, the TIA may include a level shifter configured to maintain the voltage at the gate of a transistor used to implement the first common-source gain stage of the feedback loop shifted by a certain amount with respect to the voltage at an input port to the TIA. In some aspects, at least portions of the TIA may be biased using bias currents that are configured to be process-, supply voltage-, and/or temperature-dependent. Various embodiments of the TIAs disclosed herein may benefit from one or more of the following advantages: reduced noise, reduced input impedance, reduced temperature coefficient of input impedance, and stability for a wide range of sensor frequencies.

HIGHLY LINEAR INPUT AND OUTPUT RAIL-TO-RAIL AMPLIFIER
20200358406 · 2020-11-12 ·

An amplifier includes input transconductors that receive an input signal, the input signal having a voltage swing. A supply side current mirror generates a gate voltage as a function of input signal voltage and current sources that provide a bias current of the input transconductors as a function of the gate voltage to maintain a constant bias current across the voltage swing of the input signal. Resistors average source voltages of the transconductance-cancelling transconductors to provide an average source voltage and apply the average source voltage to wells of input devices of the transconductance-cancelling transconductors to reduce back bias effect. The input devices are laid out in a same well and have a common centroid to cancel out process mismatches. A first I-DAC trims an offset of first transconductors, and a second I-DAC trims an offset of second transconductors to attain low offsets across a rail-to-rail input common mode range.