Various methods and circuital arrangements for biasing gates of stacked transistor amplifier that includes two series connected transistor stacks of different polarities are presented, where the amplifier is configured to operate according to different modes of operation. Such circuital arrangements operate in a closed loop with a feedback error voltage that is based on a sensed voltage at a common node of the two series connected transistor stacks. According to one aspect, gate biasing voltages to input transistors of each of the two series connected stacks are adjusted by respective current mirrors that are controlled based on the feedback error voltage. According to another aspect, other gate biasing voltages are generated by maintaining a fixed gate biasing voltage between any two consecutive gate basing voltages.

Certain aspects of the present disclosure generally relate to an amplifier configured to process signals received in different frequency bands, where at least a portion of the amplifier is shared between different modes corresponding to the different frequency bands. One example circuit generally includes an amplifier having at least one first transistor configured to amplify a first signal received in a first mode of operation (e.g., associated with a particular frequency band), and at least one second transistor configured to amplify a second signal received in a second mode of operation. The amplifier may also include a transformer comprising a primary winding and a secondary winding, and one or more switches configured to selectively couple the primary winding to the first transistor or the second transistor based on the first mode or the second mode of operation, respectively. In certain aspects, the transformer may be coupled to a transconductance circuit.

A power amplifier includes a common source amplifier and a common gate amplifier circuit. The common source amplifier circuit has a terminal connected to a radio frequency (RF) input terminal and uses a source terminal commonly as an input terminal and an output terminal of the power amplifier. The common gate amplifier circuit has a terminal connected to the common source amplifier circuit and another terminal connected to an RF output terminal, and uses a gate terminal commonly as the input terminal and the output terminal of the power amplifier. The common gate amplifier circuit includes a Doherty amplifier including a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel.

A scalable periphery tunable matching power amplifier is presented. Varying power levels can be accommodated by selectively activating or deactivating unit cells of which the scalable periphery tunable matching power amplifier is comprised. Tunable matching allows individual unit cells to see a constant output impedance, reducing need for transforming a low impedance up to a system impedance and attendant power loss. The scalable periphery tunable matching power amplifier can also be tuned for different operating conditions such as different frequencies of operation or different modes.

Embodiments provide an amplification circuit, an apparatus for amplifying, a low noise amplifier, a radio receiver, a mobile terminal, a base station, and a method for amplifying. An amplification circuit (10) for amplifying a radio signal comprises a first amplification stage (12) configured to amplify an input signal, V.sub.in(t), to obtain an intermediate signal. The amplification circuit (10) further comprises a cascoding circuit (14) configured to amplify the intermediate signal to obtain a first output signal V.sub.outn(t). The amplification circuit (10) further comprises a second amplification stage (16) configured to amplify the intermediate signal to obtain a second output signal, V.sub.outp(t).

An amplifier according to an embodiment of the present invention includes a first transistor and a second transistor that are connected between a ground point and a power supply. A control terminal of the first transistor is connected to an input terminal. A first terminal of the first transistor is connected to the ground point. A second terminal of the second transistor is connected to an output terminal. The amplifier further includes an impedance element and a variable resistance unit. The impedance element is connected between the second terminal of the second transistor and the power supply. The variable resistance unit is connected between the second terminal of the first transistor and the first terminal of the second transistor.

Circuits for protecting devices, such as gallium nitride (GaN) devices, and operating methods thereof are described. The circuits monitor a magnitude of the current in a device and reduce the magnitude of the current and/or shut down the device responsive to the magnitude of the current exceeding a threshold. These circuits safeguard devices from damaging operating conditions to prolong the operating life of the protected devices.

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are possible where the amplifier is configured to operate in at least an active mode and a standby mode. Circuital arrangements can reduce bias circuit and stacked transistors standby current during operation in the standby mode and to reduce impedance presented to the gates of the stacked transistors during operation in the active mode while maintaining voltage compliance of the stacked transistors during both modes of operation.

An apparatus includes a radio-frequency (RF) circuit, which includes a power amplifier coupled to receive an RF input signal and to provide an RF output signal in response to a modified bias signal. The RF circuit further includes a bias path circuit coupled to modify a bias signal as a function of a characteristic of an input signal to generate the modified bias signal. The bias path circuit provides the modified bias signal to the power amplifier.

A reconfigurable amplifier includes a first transistor having a gate coupled to an input of the reconfigurable amplifier, and a source coupled to a ground. The reconfigurable amplifier also includes a gate control circuit, and a second transistor having a gate coupled to the gate control circuit, a source coupled to a drain of the first transistor, and a drain coupled to an output of the reconfigurable amplifier, wherein the gate control circuit is configured to output a bias voltage to the gate of the second transistor in a cascode mode, and output a switch voltage to the gate of the second transistor in a non-cascode mode. The reconfigurable amplifier further includes a load coupled to the output of the reconfigurable amplifier.