A predistorter has a first capacitor, a first bias input circuit, a second bias input circuit, a second capacitor and an impedance conversion circuit. A first end of the first capacitor is coupled to a first node of the amplifier. The impedance conversion circuit has a first resistor and a field-effect transistor (FET) and is used to perform an impedance conversion to provide a variable capacitance. A gate of the FET is coupled to an output end of the first bias input circuit, one of a source and a drain of the FET is coupled to a second end of the first capacitor and a first end of the first resistor, and another of the source and the drain of the FET is coupled to an output end of the second bias input circuit, first end of the second capacitor and a second end of the first resistor.

A transmitter is configured to generate a DOCSIS signal for transmission onto a frequency-selective coaxial cable. The transmitter comprises a first reverse tilt filter circuit, a digital predistortion circuit, a forward tilt filter, a wideband equalizer, a second reverse tilt filter, and a power amplifier. The responses of the tilt filters may be set based on the frequency response of the frequency-selective coaxial cable to which the transmitter is intended to be coupled. The predistortion circuit may compensate for distortion introduced by circuitry of the transmitter. The equalizer circuit may be operable to compensate for undesired linear response of other circuitry of the transmitter.

Some embodiments relate to a device, comprising an amplifier and a linearizer, the linearizer comprising a first transistor, the first transistor comprising a first terminal coupled to an input of the amplifier, a second terminal configured to be coupled to a DC supply voltage, and a control terminal configured to control a current flowing between the first and second terminals and configured to receive a DC bias voltage different from a voltage of the first terminal. Some embodiments relate to a device, comprising an amplifier, comprising an input, an output, and a first set of one or more transistors coupled between the input and the output, and a linearizer, comprising a second set of one or more transistors coupled between a DC supply voltage and the input of the amplifier, wherein the first set of transistors and the second set of transistors have a same topology.

A predistorter has a first capacitor and an impedance conversion circuit. A first end of the first capacitor is coupled to a first node of the amplifier. The impedance conversion circuit is used to perform an impedance conversion to provide a variable capacitance. The impedance conversion circuit has a first bias input circuit and a bipolar junction transistor (BJT). The first bias input circuit is used to receive a first input bias. A base of the BJT is coupled to an output end of the first bias input circuit and a second end of the first capacitor, a collector of the BJT is floating, and an emitter of the BJT is coupled to a second node of the amplifier.

In a system, known digital representations are generated, and test analog signals are generated using the known digital representations. The test analog signals are transmitted using a transmitter of a transmission system. The test analog signals are received using a receiver of the transmission system and used to generate test received digital representations. The test received digital representations are cross-correlated with the known digital representations to generate a mixing matrix. The mixing matrix is inverted to generate a de-mixing matrix, which is applied to subsequent digital data to be encoded onto a signal and transmitted by the transmitter to generate pre-compensated digital data.

It is provided a method for providing feedback to pre-distorters in branches of a MISO system such that the pre-distortion cancels distortions caused by the signal path and the combiner combining the signals from the branches into which input signals are input. The method includes generating uncorrelated noises and mixing them with the input signals, evaluating the output of the combiner based on the input signals and the noises in order to determine a respective contribution of each input signal to the output of the combiner, and accordingly determining an appropriate pre-distortion. The signal path may apply a non-linear and/or dynamic function on the signal.

A high-linearity linearizer system includes a multi-stage linearizer circuit formed by cascading multiple linearizer circuits. The multi-stage linearizer circuit is configured to pre-distort an input signal to generate a pre-distorted signal. A non-linear high-power amplifier (HPA) having non-linear characteristics is coupled to the multi-stage linearizer circuit and is configured to amplify the pre-distorted signal. Pre-distortion characteristics of the multi-stage linearizer circuit are configured to counter the non-linear characteristics of the non-linear HPA and to compensate a non-linearity of the non-linear HPA to achieve a desired level of linearity.

Apparatus and methods for power amplifier distortion networks are disclosed. In one aspect, there is provided a power amplifier system including a power amplifier configured to amplify a radio frequency input signal. The power amplifier including an input configured to receive the radio frequency input signal and an output configured to generate an amplified radio frequency signal. The power amplifier system further includes a distortion network electrically coupled to either the input or the output of the power amplifier. The distortion network including a plurality of channelized resistors. The channelized resistors connected in series to either an input or an output of the power amplifier.

A structure having: a plurality of field effect transistors (FETs) connected between a common input and a common output, each one of the field effect transistors comprises: a source region, a drain region, and a gate electrode for controlling carriers through a channel region of a transistor region of the structure between the source region and the drain region; a plurality of diodes, each one of the diodes being associated with a corresponding one of the plurality of FETs, each one of the diodes having an electrode in Schottky contact with a diode region of the corresponding one of the FETs. The gate electrode and the diode electrode extend along parallel lines. The source region, the drain region, the channel region, and a diode region having therein the diode are disposed along a common line.

A method for improving the linearity of a radio frequency power amplifier, a compensation circuit (307) for implementing the method, and a communications terminal with the compensation circuit (307). In the method, a compensation circuit (307) is connected between a base (a3) and a collector (b3) of a transistor of a common emitter amplifier (306), in order to neutralize the impact of a variation in capacitance between the base (a3) and the collector (b3) of the transistor (306) according to a radio frequency signal. No additional direct-current power consumption is needed, and degradation in performance of other radio frequency power amplifiers can be avoided. The corresponding compensation circuit (307) can be easily integrated with a main amplification circuit, without affecting other performance of the main amplification circuit, and provides high adjustability.