An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

The present disclosure provides a power amplifier and an electrical device. The two-stage power amplifier architecture is tuned staggered before power combining. A previous stage matching network and its input matching are split into a cascaded staggered tuning, such that the center frequency is at frequency point 1 less than the design frequency point and frequency point 2 greater than design frequency point, and then the power combining stage is tuned at the design frequency point. At advanced process nodes (such as 65 nm or below), compared with the known architecture, in-band signal quality and out-of-band filtering effect of the power amplifier chip integrating this architecture will be better when using the same number of transformers (same area), the reliability will be better. Due to its good flatness within the band, this architecture is especially suitable for carrier aggregation communication occasions.

A linear amplifier is provided to have higher efficiency for an envelope tracking modulator. In one embodiment, a first stage amplifier circuit can be simply operated in a high gain mode or a high bandwidth mode for different applications, without using large chip area. In another embodiment, an output stage has a cascode structure whose dynamic range is controlled according to a voltage level of a supply voltage, to make a core device within the output stage have better protection and suitable dynamic range.

A circuit for inductive peaking may include a driver, an inverter, a resistor between an output node of the driver and an input node of the inverter and a switch. For example, a first node of the resistor may be connected to the output node of the driver and a second node of the resistor may be connected to the input node of the inverter. The switch may be connected between an output node of the inverter and the first node of the resistor. An input node of the driver may correspond to an input node of the circuit and the output node of the driver may correspond to an output node of the circuit.

The present invention breaks up the frequency bands which can be filtered by a simple low-loss band-pass or low pass filter. The second harmonic frequency is reduced by use of a non-linear clipper element which controls the driving waveform symmetry and can reduce the harmonics by as much as 5-15 db which makes the filter much simpler and allows the amplifier to remain wide-band. The output waveform from the amplifier is symmetrical or nearly symmetrical.

An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.

Systems and methods of noise suppression by an amplifier are presented. In one exemplary embodiment, an amplifier comprises first and fourth transistors configured as a first differential pair of transistors in a common-gate configuration, and second and third transistors configured as a second differential pair of transistors in a common-source configuration. The first and fourth transistors are operative to receive, from a differential input, by a source of each first and fourth transistor, a differential input signal. Further, a drain of each first and fourth transistor is coupled to respective first and second outputs configured as a differential output. The second and third transistors are operative to output, from a drain of each second and third transistor, to the respective second and first outputs, a differential output signal. Further, a gate of each second and third transistor is coupled to the respective first and second inputs.

An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.