A conversion circuit for converting a current signal into a first output voltage signal, where the current signal flows through a sensing component, is provided. The conversion circuit includes: a first current eliminating circuit, configured to eliminate a first current in the current signal. The first current eliminating circuit includes: a current sample and hold circuit; and a current driving circuit, coupled between the sensing component and the current sample and hold circuit; a second current eliminating circuit, coupled to the sensing component and configured to eliminate a second current in the current signal; and an integrating circuit, coupled to the sensing component and configured to integrate a third current in the current signal, and output a first input voltage signal between a first integration output terminal and a second integration output terminal.

According to one embodiment, a transimpedance circuit includes: a transimpedance amplifier that converts a current signal into a voltage signal, a reference voltage generating circuit that generates a reference voltage signal, and a comparator that generates a pulse signal corresponding to the current signal in accordance with a voltage level of the voltage signal and a voltage level of the reference voltage signal. The transimpedance amplifier includes a first transistor that amplifies the current signal, a voltage converter that converts the current signal into a voltage signal, and a bypass circuit that allows the current signal to be bypassed when the current signal which flows through a control terminal of the first transistor exceeds a predetermined value.

A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path.

The present technology relates to a comparator that can easily modify operating point potential of the comparator, and an imaging device. A pixel signal output from a pixel, and, a reference signal with changeable voltage are input to a differential pair. A current mirror connected to the differential pair, and a voltage drop mechanism allowed to cause a predetermined voltage drop is connected between a transistor that configures the differential pair, and a transistor that configures the current mirror. A switch is connected in parallel to the voltage drop mechanism. The present technology can be applied, for example, to an image sensor that captures an image.

A pixel circuit includes a differential amplifier. The differential amplifier includes a non-inverting input terminal, an inverting input terminal, and an output terminal. The differential amplifier includes an input differential pair including first and second NMOS transistors, a current mirror pair including PMOS transistors, and a constant current source including a fifth NMOS transistor. A threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of the fifth NMOS transistor. Further, the threshold voltage of each of the first and second NMOS transistors is higher than a threshold voltage of another NMOS transistor.

A transimpedance amplifier (TIA) device. The device includes a photodiode coupled to a differential TIA with a first and second TIA, which is followed by a Level Shifting/Differential Amplifier (LS/DA). The photodiode is coupled between a first and a second input terminal of the first and second TIAs, respectively. The LS/DA can be coupled to a first and second output terminal of the first and second TIAs, respectively. The TIA device includes a semiconductor substrate comprising a plurality of CMOS cells, which can be configured using 28 nm process technology to the first and second TIAs. Each of the CMOS cells can include a deep n-type well region. The second TIA can be configured using a plurality CMOS cells such that the second input terminal is operable at any positive voltage level with respect to an applied voltage to a deep n-well for each of the plurality of second CMOS cells.

An optical sensor and a method having a high linearity digital controlling mechanism are provided. An optoelectronic component converts a light energy into a photocurrent. Then, the photocurrent flows to a current mirror and is amplified by a gain to form a charging current by the current mirror to charge a capacitor. A comparator compares a voltage of the capacitor with a reference voltage multiple times to generate a comparison signal. A counter determines a digital value capturing range according to the gain, and counts bit values that fall within the digital value capturing range from the comparison signal to output a counted signal. A noise cancellation processor reduces the digital value capturing range according to the gain, and removes one or more of the bit values that do not fall within the digital value capturing range from the counted signal to output a sensed signal.

In a semiconductor device, power consumption is reduced. Further, a standby circuit is formed of a few elements, and thus increase in the circuit area of the semiconductor device is prevented. The standby circuit provided in the semiconductor device is formed of only one transistor and voltage supplied to the transistor is switched, whereby output current of the semiconductor device is controlled. As a result, the output current of the semiconductor device in a standby state can be substantially zero, so that the power consumption can be reduced. By using an oxide semiconductor for a semiconductor layer of a transistor, leakage current can be suppressed as low as possible.

A circuit configured to amplify a signal from which an offset is cancelled includes an amplifier including an input stage configured to receive an input signal, the amplifier configured to amplify the input signal and output the amplified signal, and a switch including a transistor configured to reset the amplifier in response to a reset signal, the transistor including a body node connecting the transistor to the circuit, the transistor being configured to form a current path between the body node of the transistor and the input stage of the amplifier.

A transimpedance amplifier (TIA) structure includes an input node with a variable inductance component serving to reduce variation in peak amplitude over different gain conditions. According to certain embodiments, an inductor at the TIA input has a first node in communication with a Field Effect Transistor (FET) drain, and a second node in communication with the FET source. A control voltage applied to the FET gate effectively controls the input inductance by adding a variable impedance across the inductor. Under low gain conditions, lowering of inductance afforded by the control voltage applied to the FET reduces voltage peaking. TIAs in accordance with embodiments may be particularly suited to operate over a wide dynamic range to amplify incoming electrical signals received from a photodiode.