An apparatus includes a Transimpedance Amplifier (TIA), an input interface and input masking circuitry. The TIA is configured to convert input current pulses into output voltage pulses. The input interface is configured to receive a control signal indicative of one or more time intervals. The input masking circuitry is configured to prevent the input current pulses from saturating the TIA during the one or more time intervals indicated by the control signal.

In accordance with aspects of the present invention, embodiments of a photodiode circuit. A photodiode circuit according to some embodiments includes a transimpedance amplifier; a resistor coupled across the transimpedance amplifier; and an amplifier stage coupled to receive an output from the transimpedance amplifier, wherein the photodiode circuit provides dynamic range across a current range of the photodiode circuit. In some embodiments, the transimpedance amplifier includes a receive signal strength indicator that provides a DC current signal to a tail of a first amplifier stage, the tail providing a current that is adaptively related to the DC current. In some embodiments, the resistor is a shielded resistor. In some embodiments, the adaptive current sink includes a plurality of switchable parallel current sinks.

An optical receiver disclosed includes a bias terminal, an input terminal, a photodiode, an amplifier circuit, a first resistor, a bypass circuit, a filter circuit, and a control circuit. The photodiode receives a bias from the filter circuit through the bias terminal, and outputs a current signal to the amplifier circuit through the input terminal. The amplifier circuit converts an input current to an output voltage. The bypass circuit electrically connected to the input terminal decreases a first input impedance viewed from the input terminal, when activated, and increases the first input impedance, when deactivated. The filter circuit increases a second input impedance viewed from the bias terminal, when a dumping function thereof is activated, and decreases the second input impedance, when the dumping function is deactivated. The control circuit activates the dumping function and the bypass circuit, when the output voltage is larger than a certain voltage.

A transimpedance amplifier (TIA) circuit disclosed includes an input terminal, a first TIA circuit, a second TIA circuit, a field effect transistor (FET), and a gain control circuit. The first TIA circuit outputs a voltage signal from a first output in accordance with an input current received at a first input electrically connected to the input terminal. The second TIA circuit outputs a reference signal from a second output. The FET varies a resistance between a first current terminal and a second current terminal in accordance with a control signal applied to a control terminal. The first current terminal is electrically connected to the input terminal. The second current terminal is electrically connected to the second output of the second TIA circuit. The gain control circuit detects an amplitude of the voltage signal and generates the control signal according to a detection result of the amplitude.

A CMOS trans-impedance amplifier includes an inverting amplifier circuit and a feedback resistor. The inverting amplifier circuit includes an input end and an output end, and the feedback resistor is coupled therebetween. The inverting amplifier circuit includes at least three sequentially-connected amplifier units, and each amplifier unit includes at least three sequentially-connected nFETs, namely an input signal receiving part nFET, an intermediate part nFET and a DC signal receiving part nFET. A common connection terminal of the input signal receiving part nFET and the intermediate part nFET is configured to output an amplified voltage signal.

In one embodiment, stable and controlled circuit element biasing is provided in a circuit comprising a voltage source operable to output a first voltage, a reference voltage source operable to output a reference voltage, a circuit element biased, during operation, by the first voltage at a first end and by a second voltage at a second end, a voltage controller coupled to the second end of the circuit element, wherein the voltage controller is operable to adjust the second voltage based on a gain output, a gain controller operable to receive the reference voltage as a first input and the second voltage as a second input, wherein the gain controller is operable to generate, at an output of the gain controller, the gain output based on the second voltage and the reference voltage, and a feedback loop that extends from the output of the gain controller, through the voltage controller, and to the second input.

An amplifier includes a first capacitor connected between an input node and a floating node, a second capacitor connected between the floating node and an output node, an amplifying element connected between a power supply voltage and the output node and operating in response to a voltage level of the floating node, a current bias source connected between the output node and a ground voltage, a first reset switch connected between the floating node and an intermediate node and operating in response to a reset bias, a second reset switch connected between the intermediate node and the output node and operating in response to the reset bias, and a reset bias generator circuit that outputs the reset bias in response to a reset signal. The reset bias is one of a reset voltage of the intermediate node, the power supply voltage, and the ground voltage.

Techniques are provided for a transimpedance amplifier (TIA). A TIA implementing the techniques according to an embodiment includes a pre-amplifier stage configured to amplify an input signal. The pre-amplifier stage includes a first P-channel metal oxide semiconductor field effect transistor (MOSFET) (P1), a second P-channel MOSFET (P2), a first N-channel MOSFET (N1), and a second N-channel MOSFET (N2), coupled in series. The gates of P1 and N2 are driven by the input signal. The output of the pre-amplifier stage is provided at a coupling between the drain of P2 and the drain of N1. The pre-amplifier stage also includes an active resistor network configured to provide a variable resistance based on a provided current bias generated from a gain control signal. The active resistor network is coupled between the gate of P1 and the drain of P2. The variable resistance is used to control the gain of the pre-amplifier stage.

A clock generation circuit includes a mode-locked laser that generates an optical pulse, a photodiode that photoelectrically converts the optical pulse generated by the mode-locked laser, and a filter that attenuates at least one of a DC component and a harmonic component of the mode-locked laser included in an electric signal output from the photodiode.

The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.