Patent classifications
H03F3/087
Method and apparatus for bias control with a large dynamic range for Mach-Zehnder modulators
Improved dither detection, measurement, and voltage bias adjustments for an electro-optical modulator are described. The electro-optical modulator generally includes RF electrodes and phase heaters interfaced with semi-conductor waveguides on the arms of Mach-Zehnder interferometers, where a processor is connected to output a bias tuning voltage to the electro-optical modulator for controlling optical modulation. A variable gain amplifier (VGA) can be configured with AC coupling connected to receive a signal from a transimpediance amplifier (TIA) that is configured to amply a photodetector signal from an optical tap that is used to measure an optical signal with a dither signal. The analog to digital converter (ADC) can be connected to receive output from the VGA. The processor can be connected to receive the signal from the ADC and to output the bias tuning voltage based on evaluation of the signal from the tap.
Method and system for process and temperature compensation in a transimpedance amplifier using a dual replica
The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.
Logarithmic amplifier circuit
A logarithmic amplifier circuit includes an adaptive gain amplifier circuit and a transistor. The adaptive gain amplifier circuit includes a gain stage and a diode. The gain stage includes an input terminal, and an output terminal. The diode includes a cathode terminal coupled to the output terminal, and an anode terminal coupled to a common terminal. The transistor includes a first terminal coupled to the input terminal, a second terminal coupled to the common terminal, and a third terminal coupled to the output terminal.
Transimpedance amplifiers with adjustable input range
A multi-stage transimpedance amplifier (TIA) with an adjustable input linear range is disclosed. The TIA includes a first stage, configured to convert a single-ended current signal from an optical sensor of a receiver signal chain to a single-ended voltage signal, and a second stage, configured to convert the single-ended voltage signal provided by the first stage to a differential signal. In such a TIA, the input linear range may be adjusted using a clamp that is programmable with an output offset current to keep the second stage of the TIA from overloading and to maintain a linear transfer function without compression.
Photoplethysmography front-end receiver
A photoplethysmography front-end receiver is capable of eliminating an error in the estimation of an ambient-light current. The receiver includes a current-to-voltage conversion circuit, an integrator, a switch circuit, and an analog-to-digital converter (ADC). The current-to-voltage conversion circuit converts an input current into a differential voltage signal. The integrator receives the differential voltage signal and outputs an analog output voltage. The switch circuit is set between the current-to-voltage conversion circuit and the integrator, forwards the differential voltage signal to the integrator in a first duration when a controllable light source is turned on, and forwards an inverted signal of the differential voltage signal to the integrator in a second duration when the controllable light source is turned off, wherein the second duration is after or before the first duration. The ADC generates a digital signal for analysis according to the analog output voltage after the second duration.
UNIVERSAL INTERFACE
An interface circuit includes an input circuit. The input circuit includes a first input pin, a second input pin and a third input pin. The input circuit further includes a first operational amplifier including a first output pin, a first non-inverting input pin electrically coupled to the first input pin via a first impedance and a first switch, and a first inverting input pin coupled to the first output pin. The input circuit also includes a second operational amplifier including a second output pin, a second non-inverting input electrically coupled to the second input pin via a second impedance and a second inverting input pin electrically coupled to the third input pin via a third impedance and a second switch. The first input pin and the second input pin are electrically coupled via a third switch and a fourth impedance.
BaseLine Restoration Circuit
Aspects of the present disclosure include circuits, systems and methods for baseline signal restoration over differential outputs. Circuits according to certain embodiments include an input module for receiving a signal from a sensor, an amplifier module, operably connected to the input module, for modifying the input signal, a baseline restoration module, operably connected to the amplifier module, for extracting a direct current component of the input signal, and an output module, operably connected to the amplifier module, for transmitting a baseline restored signal, wherein the output module comprises differential outputs. Baseline restoration systems according to certain embodiments include a baseline restoration circuit for generating a baseline restored signal on differential outputs, a downstream receiver circuit for receiving a baseline restored signal on differential inputs transmitted by the baseline restoration circuit, and cable core wires configured to connect the differential outputs of the baseline restoration circuit with the differential inputs of the downstream receiver circuit. Flow cytometry systems with baseline restoration using the subject circuits are described. Methods for baseline restoration are also provided.
SEMICONDUCTOR CIRCUIT
According to one embodiment, a semiconductor circuit includes a first transimpedance amplifier and a second transimpedance amplifier. The first transimpedance amplifier is configured to convert an input current to a first output voltage and output the first output voltage from a first output terminal when a reference voltage is supplied to a first input terminal and the input current is supplied to a second input terminal. The second transimpedance amplifier has a circuit configuration similar to a circuit configuration of the first transimpedance amplifier. The second transimpedance amplifier is configured to output a second output voltage from a second output terminal when the reference voltage is supplied to a third input terminal.
RECEPTION CIRCUIT FOR OPTICAL COMMUNICATION
A reception circuit includes an input terminal configured to receive an input current; a voltage signal circuit being configured to convert a current signal into a voltage signal; a reference voltage circuit configured to generate a reference voltage in accordance with a first feedback current; a differential amplifier circuit configured to generate a differential signal in accordance with a voltage difference between the voltage signal and the reference voltage; and an offset control circuit configured to generate the first feedback current and a second feedback current, adjust the first feedback current when the voltage signal has an average voltage value greater than the reference voltage, and subtract the second feedback current from the input current such that the offset of the differential signal falls within the tolerance when the voltage signal has an average voltage value smaller than the reference voltage.
Signal processing device controlling a gain of a current signal
In a signal processing device, a branch section generates, from an input signal which is a current signal, a plurality of branch signals that are proportional to the input signal and have different signal intensities, and supplies the plurality of branch signals to respective different individual paths. A selection section selects one of the plurality of individual paths and outputs a signal supplied through the selected individual path. A determination section determines whether in each of the plurality of individual paths, a magnitude of a signal supplied to the selection section is in a preset allowable range. A control section causes the selection section to select the individual path having a highest gain among the individual paths in which the magnitude of the signal is determined by the determination section to be in the allowable range.