A rapid sensing value estimation circuit and a method thereof are provided. The circuit includes a first sensing unit, an integration sensing circuit and a rapid estimation circuit. The rapid estimation circuit includes a clock generator, a second counter, a first digital comparator, an arithmetic module and a remainder calculation module. The clock generator generates a clock signal with a first frequency. The second counter counts the clock signal within the integration time to generate a second count value. The first digital comparator determines whether the second count value exceeds a first predetermined count value when the first count value increases. The arithmetic module calculates an estimated count value result and a remainder, and the remainder calculation module can further calculate and estimate values of decimal places of this signal based on the remainder.

It is described a charge preamplifier device (100) integrated in a chip (200) of semiconductive material comprising: an input (IN) for an input signal (i.sub.IN) and an output (OUT) for an output signal (v.sub.OUT); a substrate (202) of semiconductive material doped according to a first type of conductivity; an electrically insulating layer (204) placed on said substrate (202); a feedback capacitor (C.sub.f) integrated in the chip (200) and comprising a first electrode (3) connected to the input (IN) and a second electrode (2) connected to the output (OUT). The second electrode (2) is formed by a doped conductive region (205) having a second type of conductivity, opposite to the first type of conductivity, and integrated in the substrate (202) in order to face the first electrode (3).

An amplifier circuit includes: an operational amplifier that includes two input terminals and an output terminal; a voltage-dividing resistor circuit electrically connected to the output terminal and that includes a voltage-dividing terminal that outputs a potential obtained by voltage-dividing a potential of the output terminal and a feedback resistor circuit electrically connected to the voltage-dividing terminal and one of the two input terminals. The voltage-dividing resistor circuit includes a plurality of resistors that each include terminals and a switch. The plurality of resistors includes a first resistor and a second resistor. The first resistor includes a terminal that corresponds to the voltage-dividing terminal. The switch switches, from a first terminal of the first resistor to a second terminal of the second resistor, the terminal that corresponds to the voltage-dividing terminal.

System and apparatus for measuring biopotential and implementation thereof. A device for mitigating electromagnetic interference (EMI) thereby increasing signal-to-noise ratio is disclosed. Specifically, the present disclosure relates to an elegant, novel circuit for measuring a plurality of biopotentials in useful in a variety of medical applications. This allows for robust, portable, low-power, higher S/N devices which have historically required a much bigger footprint.

Low-noise optical differential receivers are described. Such differential receivers may include a differential amplifier having first and second inputs and first and second outputs, and four photodetectors. A first and a second of such photodetectors are coupled to the first input of the differential amplifier, and a third and a fourth of such photodetectors are coupled to the second input of the differential amplifier. The anode of the first photodetector and the cathode of the second photodetector are coupled to the first input of the differential amplifier. The cathode of the third photodetector and the anode of the fourth photodetector are coupled to the second input of the differential amplifier. The optical receiver may involve two stages of signal subtraction, which may significantly increase noise immunity.

In described examples, a circuit includes an integrator. The integrator generates a first signal responsive to an input signal. A trigger circuit is coupled to the integrator and receives the first signal. A charge dump circuit is coupled to the integrator and the trigger circuit. The trigger circuit modifies configuration of the charge dump circuit and the integrator when the first signal is greater than a first threshold.

An optical reception device includes: a light receiving element; an amplifier which receives and amplifies a current based on an input current from the light receiving element; a direct-current adjustment circuit which removes an offset current included in the input current; an alternating-current adjustment circuit which causes a part of the input current to flow therein; and a controller which controls the direct-current adjustment circuit and the alternating-current adjustment circuit. The controller includes an integrator configured to integrate an output of the amplifier and output a resultant output to two electric paths of a positive phase and a negative phase, and an inversion suppression circuit configured to operate so as to inject a current to the positive phase and extract a current from the negative phase when a negative phase potential of an output of the integrator is higher than a positive phase potential thereof.

An electronic device is provided. The electronic device includes: a substrate, a plurality of pixels, a plurality of data lines, an amplifier and a current source. The pixels and data lines are disposed on the substrate. The amplifier and the current source are coupled to one of the data lines, wherein at least a portion of the one of data lines forms a conduction path. One of the pixels is coupled to the one of the data lines at a first node, and the first node is on the first conduction path. A first current that flows from the first node to the first source terminal is different from a second current that flows from the first node to the first output terminal.

In a transimpedance amplifier circuit, a control current circuit generates a control current based on a voltage signal and a reference voltage signal and includes an integrating circuit that generates a differential integral signal based on the voltage signal and the reference voltage signal, and a transconductance amplifying circuit that includes a first transconductance circuit that generates a first output current in accordance with the differential integral signal, a second transconductance circuit that generates a second output current in accordance with the differential integral signal, and a current source that supplies a third output current, and a control circuit has an input electrically connected to an output of the first transconductance circuit, an output of the second transconductance circuit, and an output of the current source.

An amplification interface includes first and second differential input terminals, first and second differential output terminals providing first and second output voltages defining a differential output signal, and first and second analog integrators coupled between the first and second differential input terminals and the first and second differential output terminals, the first and second analog integrators being resettable by a reset signal. A control circuit generates the reset signal such that the first and second analog integrators are periodically reset during a reset interval and activated during a measurement interval, receives a control signal indicative of offsets in the measurement sensor current and the reference sensor current, and generates a drive signal as a function of the control signal. First and second current generators coupled first and second compensation circuits to the first and second differential input terminals as a function of a drive signal.