H03F3/087

High-Speed Transimpedance Amplifier with Bandwidth Extension Feature over Full Temperature Range and Bandwidth Extension Method

A high-speed transimpedance amplifier with bandwidth extension feature over full temperature range and bandwidth extension method belong to the field of integrated circuit. The present invention solves the problem existed in boosting core amplifier bandwidth technology over full temperature range. The present invention includes a preamplifier TIA, a phase splitting stage PS, a pre-driver stage Pre-Drive, an output buffer BUFF and an offset cancelation circuit OC. The preamplifier TIA adopts the gate-drain voltage cancelation technology to expand the bandwidth, so that its −3 dB bandwidth is greater than twice the closed-loop bandwidth of the first-order TIA. The pre-driver stage Pre-Drive is used to drive the output buffer BUFF. By adjusting the source-level negative feedback capacitance value of the pre-driver stage Pre-Drive circuit to generate a high-frequency gain that varies with temperature, the preamplifier TIA bandwidth differences under different temperature conditions are compensated.

TRANSIMPEDANCE AMPLIFIER CIRCUITS AND DEVICES
20230291366 · 2023-09-14 ·

The present disclosure relates to a device comprising a first transimpedance amplifier comprising a first amplification stage with a first MOS transistor, a second transimpedance amplifier comprising a second amplification stage with a second MOS transistor, and a current source series-connected with the first and second amplification stages, the current source having a first terminal coupled to the drain of the first MOS transistor and a second terminal coupled to the drain of the second MOS transistor.

High-speed transimpedance amplifier with bandwidth extension feature over full temperature range and bandwidth extension method

A high-speed transimpedance amplifier with bandwidth extension feature over full temperature range and bandwidth extension method belong to the field of integrated circuit. The present invention solves the problem existed in boosting core amplifier bandwidth technology over full temperature range. The present invention includes a preamplifier TIA, a phase splitting stage PS, a pre-driver stage Pre-Drive, an output buffer BUFF and an offset cancelation circuit OC. The preamplifier TIA adopts the gate-drain voltage cancelation technology to expand the bandwidth, so that its −3 dB bandwidth is greater than twice the closed-loop bandwidth of the first-order TIA. The pre-driver stage Pre-Drive is used to drive the output buffer BUFF. By adjusting the source-level negative feedback capacitance value of the pre-driver stage Pre-Drive circuit to generate a high-frequency gain that varies with temperature, the preamplifier TIA bandwidth differences under different temperature conditions are compensated.

TRANSIMPEDANCE AMPLIFIER HAVING T-NETWORK FEEDBACK ARCHITECTURE AND METHOD THEREOF

A transimpedance amplifier system (TIA) for stabilizing high gain and high frequency signals while minimizing parasitic capacitance effects on the transimpedance amplifier system. The TIA includes an operational amplifier having a first input terminal, a second input terminal, and an output terminal. The TIA also includes a signal generating device operatively connected with the first input terminal of the operational amplifier. The TIA also includes a T-network feedback architecture operatively connected with the operational amplifier at the first input terminal of the operational amplifier and the output terminal of the operational amplifier. The T-network feedback architecture has a first impedance network and a second impedance network. The T-network feedback architecture is configured to suppress parasitic capacitance from the transimpedance amplifier system.

Variable gain amplifier system including separate bandwidth control based on inductance contribution

A variable gain amplifier system includes a variable gain amplifier circuit configured to receive an input signal, apply a gain to the input signal, and generate an output signal in accordance with the gain applied to the input signal. The variable gain amplifier circuit is further configured to receive a gain control signal and a bandwidth control signal. A control module is configured to generate the gain control signal to adjust the gain of the variable gain amplifier circuit and generate, separately from the gain control signal, the bandwidth control signal to adjust a bandwidth of the variable gain amplifier circuit by selectively varying an amount of inductance contributed by an inductor circuit of the variable gain amplifier circuit.

Distributed integrate and dump circuit
11754444 · 2023-09-12 · ·

An analog pulse capture circuit is disclosed. The circuit may include one or more input sources configured to receive one or more optical signals and generate one or more electrical input signals. The circuit may include one or more distributed capacitors configured to store a target charge, the one or more distributed capacitors including one or more top plates and one or more bottom plates. The circuit may include one or more amplifiers coupled to the one or more distributed capacitors, the one or more amplifiers configured to generate one or more electrical output signals. The circuit may include one or more dump switches coupled to the one or more input sources, the one or more dump switches configured to release the stored target charge of the one or more distributed capacitors.

Photometer and method of performing photometric measurements with a photometer

A photometer and a method of performing photometric measurements with this photometer are described. The photometer comprises a photodetector providing a detector signal corresponding to an intensity of light received by the photodetector; and measurement electronics including: an amplifier and a signal processing device configured to determine and to provide a measurement result based on a measurement signal determined by the signal processing device as or based on an amplified detector signal provided by the amplifier. The signal processing device is configured to determine the measurement signal: a) as or based on the amplified detector signal provided by the amplifier being a multistage amplifier including a transimpedance converter and a voltage to current amplifier; and/or b) in form of a noise reduced signal determined by subtracting a previously determined noise offset included in the amplified detector signal from the amplified detector signal.

Amplifier circuit
11658629 · 2023-05-23 · ·

An amplifier circuit includes: an operational amplifier that includes two input terminals and an output terminal; a voltage-dividing resistor circuit electrically connected to the output terminal and that includes a voltage-dividing terminal that outputs a potential obtained by voltage-dividing a potential of the output terminal and a feedback resistor circuit electrically connected to the voltage-dividing terminal and one of the two input terminals. The voltage-dividing resistor circuit includes a plurality of resistors that each include terminals and a switch. The plurality of resistors includes a first resistor and a second resistor. The first resistor includes a terminal that corresponds to the voltage-dividing terminal. The switch switches, from a first terminal of the first resistor to a second terminal of the second resistor, the terminal that corresponds to the voltage-dividing terminal.

ANALOG-TO-DIGITAL CONVERTING CIRCUIT USING AUTO-ZERO PERIOD OPTIMIZATION AND OPERATION METHOD THEREOF
20230155596 · 2023-05-18 ·

A circuit includes a first amplifier that first compares a ramp signal and a reset signal of a pixel signal output from a pixel array in a first operation period, second compares the ramp signal and an image signal of the pixel signal in a second operation period, and generates a first output signal in the first and second operation periods based on first and second comparison results; and a second amplifier that charges a capacitor in response to a second auto-zero signal in a second auto-zero period, stops an operation of the second amplifier from a time point at which the second auto-zero period ends to a time point at which the first operation period starts, and generates a second output signal based on the first output signal in the first operation period and the second operation period.

Differential transimpedance amplifier employing asymmetric signal paths

An asymmetric signal path approach is used to extract differential signals out of the photodetector (e.g., a photodiode) for amplification by a differential transimpedance amplifier (TIA). This asymmetric-path differential TIA configuration has less low-frequency Inter Symbol Interference (ISI) (also known as Baseline Wander), less high-frequency noise amplification, and higher bandwidth capabilities. There is no power penalty with this design in comparison to a single-ended TIA, can extend the range of the link for a given system power consumption, and can decrease transmitter power for a given range.