Certain aspects of the present disclosure provide methods and apparatus for current-limiting protection of an amplifier, such as a power amplifier in a radio frequency (RF) front-end. One example current-limiting circuit generally includes a node coupled to a current source, a plurality of current-sinking devices coupled to the node, one or more switches coupled between the node and at least one of the plurality of current-sinking devices, and a bias circuit having an input coupled to the node and an output for coupling to an input of the amplifier.

Certain aspects of the present disclosure provide methods and apparatus for current-limiting protection of an amplifier, such as a power amplifier in a radio frequency (RF) front-end. One example current-limiting circuit generally includes a node coupled to a current source, a plurality of current-sinking devices coupled to the node, one or more switches coupled between the node and at least one of the plurality of current-sinking devices, and a bias circuit having an input coupled to the node and an output for coupling to an input of the amplifier.

The disclosed technology can include a power amplifier comprising an input, an output, and a transformer. The power amplifier can include a primary inductor coil coupled to the input, a secondary inductor coil coupled to the output, and three harmonic branches coupled to the primary coil. Each branch can comprise at least one electrical component having a tunable impedance.

The disclosed technology can include a power amplifier comprising an input, an output, and a transformer. The power amplifier can include a primary inductor coil coupled to the input, a secondary inductor coil coupled to the output, and three harmonic branches coupled to the primary coil. Each branch can comprise at least one electrical component having a tunable impedance.

A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.

In one embodiment, an impedance matching network includes an electronically variable reactance element (EVRE) comprising discrete reactance elements and corresponding switches. The switches are configured to switch in and out the discrete reactance elements to alter a total reactance provided by the EVRE. A monitoring circuit is operably coupled to the EVRE. For each discrete reactance element, the monitoring circuit monitors a value related to the discrete reactance element or its corresponding switch. Upon determining the monitored value exceeds a predetermined amount, the monitoring circuit the discrete reactance element of the EVRE from switching in or out.

In one embodiment, an impedance matching network includes an electronically variable reactance element (EVRE) comprising discrete reactance elements and corresponding switches. The switches are configured to switch in and out the discrete reactance elements to alter a total reactance provided by the EVRE. A monitoring circuit is operably coupled to the EVRE. For each discrete reactance element, the monitoring circuit monitors a value related to the discrete reactance element or its corresponding switch. Upon determining the monitored value exceeds a predetermined amount, the monitoring circuit the discrete reactance element of the EVRE from switching in or out.

A differential power amplifier includes an input matching network, a first-stage amplification circuit, a first inter-stage matching network, a second-stage amplification circuit, a second inter-stage matching network, a third-stage amplification circuit, and an output matching network. The first-stage amplification circuit and the second-stage amplification circuit are single-ended input single-ended output circuits. The third-stage amplification circuit is a dual input dual output circuit. The second inter-stage matching network includes a first transformer T1, a first capacitor C1, a second capacitor C2, a first inductor L1, and a second inductor L2. The output matching network includes a second transformer T2. The inter-stage matching networks and the output matching network are realized by the first transformer T1 and the second transformer T2, which reduces an inter-stage matching difficulty, optimizes input return loss and gain, and improves output power.

A radio frequency signal amplification device includes an amplification circuit, an impedance matching circuit, a frequency detection circuit, and a control circuit. The amplification circuit has an input terminal and an output terminal. The amplification circuit amplifies a radio frequency (RF) signal received from the input terminal, and generates an amplified radio frequency signal to the output terminal. The impedance matching circuit is coupled to the input terminal or the output terminal of the amplification circuit. The impedance matching circuit receives the radio frequency signal and provides an impedance matching the radio frequency signal, or receives the amplified radio frequency signal and provides an impedance matching the amplified radio frequency signal. The frequency detection circuit determines a frequency band to which the radio frequency signal belongs. The control circuit adjusts the impedance of the impedance matching circuit according to the frequency band.

A power amplifier circuit includes a lower transistor having a first terminal, a second terminal connected to ground, and a third terminal, wherein a first power supply voltage is supplied to the first terminal, and an input signal is supplied to the third terminal; a first capacitor; an upper transistor having a first terminal, a second terminal connected to the first terminal of the lower transistor via the first capacitor, and a third terminal, wherein a second power supply voltage is supplied to the first terminal, an amplified signal is outputted to an output terminal from the first terminal, and a driving voltage is supplied to the third terminal; a first inductor that connects the second terminal of the upper transistor to ground; a voltage regulator circuit; and at least one termination circuit that short-circuits an even-order harmonic or odd-order harmonic of the amplified signal to ground potential.