In some embodiments, a wireless local area network (WLAN) front-end can be implemented on a semiconductor die having a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for WLAN transmit operation associated with a frequency range. The semiconductor die can further include a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die can further include a transmit/receive switch implemented on the semiconductor substrate and configured to support the transmit and receive operations.

A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.

A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.

A power amplifier circuit includes a transistor having a base to which a radio frequency signal is input and a collector to which a power supply voltage that varies in accordance with an envelope of amplitude of the radio frequency signal is supplied and from which an amplified signal obtained by amplifying the radio frequency signal is output; a first termination circuit provided at a stage subsequent to the transistor and configured to attenuate a harmonic component of the amplified signal; and a second termination circuit provided at the stage subsequent to the transistor and configured to attenuate a harmonic component of the amplified signal. The first termination circuit and the second termination circuit have a property of resonating for a radio frequency signal having a frequency between a frequency of a second harmonic component and a frequency of a third harmonic component.

Embodiments described herein relate to an envelope tracking system that uses a single-bit digital signal to encode an analog envelope tracking control signal, or envelope tracking signal for brevity. In certain embodiments, the envelope tracking system can estimate or measure the amplitude of the baseband signal. The envelope tracking system can further estimate the amplitude of the envelope of the RF signal. The system can convert the amplitude of the envelope signal to a single-bit digital signal, typically at a higher, oversample rate. The single-bit digital signal can be transmitted in, for example, a low-voltage differential signaling (LVDS) format, from a transceiver to an envelope tracker. An analog-to-digital converter (ADC or A/D) can convert the single-bit digital signal back to an analog envelope signal. Moreover, a driver can increase the power of the A/D output envelope signal to produce an envelope-tracking supply voltage for a power amplifier.

Embodiments described herein relate to an envelope tracking system that uses a single-bit digital signal to encode an analog envelope tracking control signal, or envelope tracking signal for brevity. In certain embodiments, the envelope tracking system can estimate or measure the amplitude of the baseband signal. The envelope tracking system can further estimate the amplitude of the envelope of the RF signal. The system can convert the amplitude of the envelope signal to a single-bit digital signal, typically at a higher, oversample rate. The single-bit digital signal can be transmitted in, for example, a low-voltage differential signaling (LVDS) format, from a transceiver to an envelope tracker. An analog-to-digital converter (ADC or A/D) can convert the single-bit digital signal back to an analog envelope signal. Moreover, a driver can increase the power of the A/D output envelope signal to produce an envelope-tracking supply voltage for a power amplifier.

A front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.

Techniques are described for tuning a resonant circuit using differential switchable capacitors. For example, embodiments can operate in context of a power amplifier with a tunable resonant output network. To tune the network, multiple differential switchable capacitors are provided in parallel. Each differential switchable capacitor can include a pair of capacitors, each coupled between a respective internal node and a respective differential terminal; and the internal nodes are selectively coupled or decoupled using a respective electronic switch (e.g., transistor). Switching on one of the differential switchable capacitors forms a capacitive channel having an associated capacitance. Each differential switchable capacitor can also include a switch network to selectively pull the internal nodes to a high or low voltage reference according to the selected operating mode.

Techniques are described for tuning a resonant circuit using differential switchable capacitors. For example, embodiments can operate in context of a power amplifier with a tunable resonant output network. To tune the network, multiple differential switchable capacitors are provided in parallel. Each differential switchable capacitor can include a pair of capacitors, each coupled between a respective internal node and a respective differential terminal; and the internal nodes are selectively coupled or decoupled using a respective electronic switch (e.g., transistor). Switching on one of the differential switchable capacitors forms a capacitive channel having an associated capacitance. Each differential switchable capacitor can also include a switch network to selectively pull the internal nodes to a high or low voltage reference according to the selected operating mode.

A transistor amplifier includes at least one differential pair of transistors and a plurality of transformers having a primary winding and a tapped secondary winding. The secondary winding is connected across emitters or sources of each transistor pair. The tap of each secondary has a current source. The primary windings of the plurality of transformers are connected in series. The transistor bases or gates are alternating current (AC) grounded. The collector or drain terminal pairs are connected in parallel. The transistor amplifier exhibits improved input impedance and improved linearity.