A network interface device includes a passive path between an entry port and a first port. The network interface device also includes an active path between the entry port and a second port. The network interface device also includes a buffer in the active path configured to absorb, attenuate, terminate, or isolate radio-frequency (RF) signals. The network interface device also includes a switching element in the active path configured to cause the RF signals to bypass the buffer when the network interface is in a first state that exists during powered operation of the network interface device, and direct the RF signals to the buffer when the network interface device is in a second state that exists during non-powered operation or faulted operation of the network interface device.

A network interface device includes a passive path between an entry port and a first port. The network interface device also includes an active path between the entry port and a second port. The network interface device also includes a buffer in the active path configured to absorb, attenuate, terminate, or isolate radio-frequency (RF) signals. The network interface device also includes a switching element in the active path configured to cause the RF signals to bypass the buffer when the network interface is in a first state that exists during powered operation of the network interface device, and direct the RF signals to the buffer when the network interface device is in a second state that exists during non-powered operation or faulted operation of the network interface device.

An amplifier for signal amplification, the amplifier comprising: a signal input arrangement; a signal output arrangement; a first transistor; a second transistor; and a third transistor, wherein: the first, second and third transistors are coupled to one another to form a transconductance cell, the transconductance cell is coupled to the signal input arrangement and the signal output arrangement, and the transconductance cell is operable to receive a first signal from the signal input arrangement, amplify the first signal and output an amplified first signal to the signal output arrangement. There is also disclosed a receiver incorporating the amplifier and methods of operating the amplifier.

An amplifier for signal amplification, the amplifier comprising: a signal input arrangement; a signal output arrangement; a first transistor; a second transistor; and a third transistor, wherein: the first, second and third transistors are coupled to one another to form a transconductance cell, the transconductance cell is coupled to the signal input arrangement and the signal output arrangement, and the transconductance cell is operable to receive a first signal from the signal input arrangement, amplify the first signal and output an amplified first signal to the signal output arrangement. There is also disclosed a receiver incorporating the amplifier and methods of operating the amplifier.

A high frequency amplification circuit includes transmission amplification circuits 11 and 12; a transmission filter D-Tx whose pass band is a band D of a first frequency band group; transmission filters E-Tx and G-Tx whose pass bands are respectively bands E and G of a second frequency band group; an output matching circuit 31 configured to match the transmission amplification circuit 11 and the transmission filter D-Tx; and an output matching circuit 32 configured to match the transmission amplification circuit 12 and the transmission filters E-Tx and G-Tx. The band D is positioned at a high frequency-side end portion of the first frequency band group, and the band E is positioned at a low frequency-side end portion of the second frequency band group. The output matching circuit 31 includes a low-pass circuit, and the output matching circuit 32 includes an impedance-variable circuit.

A high frequency amplification circuit includes transmission amplification circuits 11 and 12; a transmission filter D-Tx whose pass band is a band D of a first frequency band group; transmission filters E-Tx and G-Tx whose pass bands are respectively bands E and G of a second frequency band group; an output matching circuit 31 configured to match the transmission amplification circuit 11 and the transmission filter D-Tx; and an output matching circuit 32 configured to match the transmission amplification circuit 12 and the transmission filters E-Tx and G-Tx. The band D is positioned at a high frequency-side end portion of the first frequency band group, and the band E is positioned at a low frequency-side end portion of the second frequency band group. The output matching circuit 31 includes a low-pass circuit, and the output matching circuit 32 includes an impedance-variable circuit.

A circuit and computer implemented method tunes an RF switching power amplifier circuit for an antenna by receiving a measurement of reflected RF signal from the antenna, receiving a measurement of current provided to the circuit from a power source, receiving a measurement of RF power provided to the antenna, adjusting a tunable antenna circuit responsive to the measurement of reflected RF signal, and adjusting a first capacitor capacitance value and a second capacitor capacitance value of a waveform shaping circuit in response to the received measurement of current and RF power.

A bias circuit generates a bias current to an RF power amplifier used for transmitting RF signals, and the amount of the bias current supplied to the RF power amplifier can be configured in multiple modes through transistor switches that are controlled by mode control signals, so that the bias current supplied to the RF power amplifier can be adjusted according to the required power level of the transmitting RF signals. In addition, the bias current can be turned off by another transistor switch that is controlled by a power control signal for saving power while the RF power amplifier is not transmitting RF signals.

A power amplifier. The power amplifier includes a plurality of parallel coupled transistors. Each transistor has a control terminal coupled to receive a signal to be amplified and an output terminal coupled to a node. The power amplifier also includes a matching network having an input coupled to the node and an output coupleable to a load. The power amplifier further includes a first circuit branch forming a choke and harmonic trap of the power amplifier. The first circuit branch includes a first inductance, a second inductance and a first capacitor. The first inductance has a first terminal coupled to the node and a second terminal coupled to a first terminal of the second inductance. A second terminal of the second inductance is coupled to AC ground. The first capacitor is coupled in parallel with the second inductance.

Switchless carrier aggregation. In some embodiments, a carrier aggregation circuit can include a first filter configured to allow operation in a first frequency band, and a second filter configured to allow operation in a second frequency band. The circuit can further include a first signal path implemented between the first filter and an output node, with the first signal path including a plurality of amplification stages configured to amplify a first signal. The first signal path can be substantially free of switches. The circuit can further include a second signal path implemented between the second filter and the output node, with the second signal path including a plurality of amplification stages configured to amplify a second signal. The second signal path can be substantially free of switches.