Patent classifications
H03F3/191
Amplifier device
A power amplifier device includes a first amplifier, a second amplifier, a capacitor, a node, and an impedance matching circuit. The second amplifier amplifies a radio frequency signal transmitted from the first amplifier. The capacitor is coupled between an output terminal of the first amplifier and an input terminal of the second amplifier. The node is disposed between the input terminal of the second amplifier and the capacitor. The impedance matching circuit is coupled to the node and a common voltage terminal. The impedance matching circuit is substantially an open circuit at a center frequency of the radio frequency signal. The impedance matching circuit provides substantially a short-circuited path from the node to the common voltage terminal at a frequency twice the center frequency.
AMPLIFICATION CIRCUIT
An amplification circuit includes an input terminal for receiving a radio frequency input signal, an output terminal for outputting an amplified radio frequency signal, a bias circuit for providing a bias voltage, an impedance circuit, a transistor, and a filter circuit. The impedance circuit is coupled to the bias circuit and the input terminal, and provides a voltage drop between the first terminal and the second terminal of the impedance circuit. The first transistor has a first terminal coupled to the output terminal, a second terminal coupled to a first reference voltage terminal, and a control terminal coupled to the impedance circuit and for receiving the radio frequency input signal. The filter circuit is coupled to the first transistor and the impedance circuit, filters out a harmonic signal, and provides a feedback signal including a primary frequency signal of the amplified radio frequency signal to the impedance circuit.
BIAS CIRCUIT AND POWER AMPLIFIER FOR IMPROVING LINEARITY
A bias circuit includes a current source to generate a reference current, a temperature compensation portion in an off-state in an initial start period in response to a first control signal, and in an on-state in a normal driving period, subsequent to the initial start period, and to receive a first current of the reference current, and a bias output portion to generate a warm up current based on the reference current in the initial start period and to generate a bias current based on a second current, which is lower than the reference current by an amount of the first current, in the normal driving period.
Active device which has a high breakdown voltage, is memory-less, traps even harmonic signals and circuits used therewith
An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.
Quasi-differential RF power amplifier with high level of harmonics rejection
A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.
Quasi-differential RF power amplifier with high level of harmonics rejection
A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.
HIGH FREQUENCY MODULE AND COMMUNICATION DEVICE
A high frequency module includes a transmission power amplifier, a bump electrode connected to a principal surface of the transmission power amplifier and having an elongated shape in a plan view of the principal surface, and a mounting board on which the transmission power amplifier is mounted, wherein the mounting board includes a via conductor having an elongated shape in the plan view, the length direction of the bump electrode and the length direction of the via conductor are aligned in the plan view, and the bump electrode and the via conductor are connected in an overlapping area where the bump electrode and the via conductor overlap at least partially in the plan view, and the overlapping area is an area elongated in the length direction.
Voltage mode power combiner for radio frequency linear power amplifier
A radio frequency (RF) power combining amplifier circuit has a circuit input and a circuit output. A first amplifier is connected to the circuit input and to a first bias input. A first output matching network is connected to an output of the first amplifier and to the circuit output. A second amplifier is connected to the circuit input and to a second bias input. A second output matching network is connected to an output of the second amplifier, and to the circuit output. A voltage level of an input signal applied to the circuit input, together with the respective first bias input and the second bias input, selectively activates the first amplifier and the second amplifier.
Voltage mode power combiner for radio frequency linear power amplifier
A radio frequency (RF) power combining amplifier circuit has a circuit input and a circuit output. A first amplifier is connected to the circuit input and to a first bias input. A first output matching network is connected to an output of the first amplifier and to the circuit output. A second amplifier is connected to the circuit input and to a second bias input. A second output matching network is connected to an output of the second amplifier, and to the circuit output. A voltage level of an input signal applied to the circuit input, together with the respective first bias input and the second bias input, selectively activates the first amplifier and the second amplifier.
High efficiency S-band amplifier
A method of constructing an amplifier circuit includes simulating an output of an amplifier device of the amplifier circuit over a range of impedances to yield a simulated maximum power and a simulated maximum power added efficiency at a particular frequency, fabricating a plurality of output matching networks and input matching networks with impedances above and below the impedances that yield the simulated maximum power and simulated maximum power added efficiency, empirically determining physical dimensions of an optimized output matching network and an optimized input matching network that result in actual impedances that provide an actual maximum power and maximum power added efficiency at the particular frequency, and coupling the optimized output matching network to an output of the amplifier device and coupling the optimized input matching network between an output of a driver circuit and an input of the amplifier device.