A power amplifier circuit includes a power amplifier that amplifies an input signal and outputs the amplified signal from an output terminal thereof, a first filter circuit that has a frequency characteristic that attenuates an Nth-order harmonic of the amplified signal, N that is an integer greater than or equal to 2, and a second filter circuit that has a frequency characteristic that attenuates the Nth-order harmonic of the amplified signal. The first filter circuit includes a first capacitor and a first inductor. The first capacitor and the first inductor are connected in series between the output terminal and ground. The second filter circuit includes a second capacitor and a second inductor. The second capacitor and the second inductor are connected in series between the output terminal and ground.

Disclosed herein is a diversity receiver (DRx) configuration configured to support carrier aggregation. The DRx configuration includes a diversity receiver (DRx) module coupled to a diversity radio frequency (DRF) module. The DRx module includes a splitter and a combiner to provide a plurality of DRx paths for signals of different frequency bands. The DRx modules includes a plurality of DRx amplifiers for individual frequency bands and the DRF module includes a plurality of downstream amplifiers. A controller is configured to adjust a gain of the DRF amplifiers in response to changes in a gain of the amplifiers of the DRx module.

Disclosed herein is a diversity receiver (DRx) configuration configured to support carrier aggregation. The DRx configuration includes a diversity receiver (DRx) module coupled to a diversity radio frequency (DRF) module. The DRx module includes a splitter and a combiner to provide a plurality of DRx paths for signals of different frequency bands. The DRx modules includes a plurality of DRx amplifiers for individual frequency bands and the DRF module includes a plurality of downstream amplifiers. A controller is configured to adjust a gain of the DRF amplifiers in response to changes in a gain of the amplifiers of the DRx module.

A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.

A circuit including: input and output nodes and first and second feedback nodes; a first input amplifier having an input connected to the input node and an output connected to the first feedback node; a second input amplifier having an input connected to the input node and an output connected to the second feedback node; a capacitor connecting the first feedback node and the second feedback node; an amplifier having an input connected to the first feedback node and an output connected to the output node; a base feedback amplifier with an input connected to the output node and an output connected to the first feedback node; a tunable feedback amplifier with an input connected to the output node and an output connected to the second feedback node; and a tuning circuit for varying a transconductance of the tunable feedback circuit and operational frequency of the peaking amplifier circuit.

A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.

A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.

Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

A composite power amplifier for amplification of an input signal into an output signal is disclosed. The composite power amplifier comprises an input port for receiving the input signal, and an output port for providing the output signal. Furthermore, the composite power amplifier comprises a first set of sub-amplifiers, comprising at least two sub-amplifiers, wherein the at least two sub-amplifiers are arranged along a taper of a first transmission line, wherein the first transmission line is connected to the first set of sub-amplifiers and the output port. Moreover, the composite power amplifier comprises a second set of sub-amplifiers, comprising at least two sub-amplifiers, wherein the at least two sub-amplifiers are arranged along a taper of a second transmission line, wherein the second transmission line is connected to the second set of sub-amplifiers and the output port.