Control systems and methods for power amplifiers operating in envelope tracking mode are presented. A set of corresponding functions and modules are described and various possible system configurations using such functions and modules are presented.

Control systems and methods for power amplifiers operating in envelope tracking mode are presented. A set of corresponding functions and modules are described and various possible system configurations using such functions and modules are presented.

A circuit includes a differential input pair stage including bipolar transistors and configured to receive an RF input signal; a cascode stage coupled between the differential input pair stage and an output node, the cascode stage including bipolar transistors; and a current source including a first bipolar transistor coupled to a first output of the differential input pair stage and a second bipolar transistor coupled to a second output of the differential input pair stage.

A composite power amplifier for amplification of an input signal into an output signal is disclosed. The composite power amplifier comprises an input port for receiving the input signal, and an output port for providing the output signal. Furthermore, the composite power amplifier comprises a first set of sub-amplifiers, comprising at least two sub-amplifiers, wherein the at least two sub-amplifiers are arranged along a taper of a first transmission line, wherein the first transmission line is connected to the first set of sub-amplifiers and the output port. Moreover, the composite power amplifier comprises a second set of sub-amplifiers, comprising at least two sub-amplifiers, wherein the at least two sub-amplifiers are arranged along a taper of a second transmission line, wherein the second transmission line is connected to the second set of sub-amplifiers and the output port.

Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.

Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.

An front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the FEM IC allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.

An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.

An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.

A package is provided. The package comprises a die and an impedance matching network. The die has a first terminal and a second terminal. The impedance matching network is coupled to the second terminal and comprises a first inductor and a first capacitor. The first inductor comprises first bond wire connections coupled between the second terminal and a first bond pad on the die, and second bond wire connections coupled between the first bond pad and a second bond pad coupled to the first capacitor.