A multi-stage Radio Frequency (RF) power amplifier is presented herein. According to one embodiment, the amplifier comprises: a first amplification stage configured to amplify an input signal to provide a first output signal having a phase distortion; a second amplification stage having an input and configured to amplify the first output signal that is received at the input to provide a second output signal, wherein the second output signal has a carrier frequency (F.sub.C) modulated by a signal content (S) having a signal content bandwidth (F.sub.S); and a resonant circuit comprising an inductor and a capacitor and having a resonant frequency (F.sub.R), the resonant circuit coupled to the input of the second amplification stage and compensating for the phase distortion caused by the first amplification stage at frequencies within the signal content bandwidth F.sub.S, wherein the resonant frequency F.sub.R is less than the signal content bandwidth F.sub.S.

A multi-stage Radio Frequency (RF) power amplifier is presented herein. According to one embodiment, the amplifier comprises: a first amplification stage configured to amplify an input signal to provide a first output signal having a phase distortion; a second amplification stage having an input and configured to amplify the first output signal that is received at the input to provide a second output signal, wherein the second output signal has a carrier frequency (F.sub.C) modulated by a signal content (S) having a signal content bandwidth (F.sub.S); and a resonant circuit comprising an inductor and a capacitor and having a resonant frequency (F.sub.R), the resonant circuit coupled to the input of the second amplification stage and compensating for the phase distortion caused by the first amplification stage at frequencies within the signal content bandwidth F.sub.S, wherein the resonant frequency F.sub.R is less than the signal content bandwidth F.sub.S.

Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

A power amplifier module includes a first current source that outputs a first current corresponding to a level control voltage for controlling a signal level of an amplified signal, a second current source that outputs a second current corresponding to the level control voltage, a first transistor in which an input signal and a first bias current are supplied to a base and an emitter is grounded, a second transistor in which an emitter is connected to a collector of the first transistor, the second current is supplied to a base, and a first amplified signal obtained by amplifying the input signal is output from a collector, and a third transistor in which the first current is supplied to a collector, a bias control current or voltage is supplied to a base, and the first bias current is supplied from an emitter to the base of the first transistor.

A power amplifier apparatus may include an amplifier configured to amplify an input signal and a delay transferring circuit connected between an input terminal and an output terminal of the amplifier, the delay transferring circuit configured to delay the input signal to transfer the delayed input signal to the output terminal of the amplifier.

A power amplifier apparatus may include an amplifier configured to amplify an input signal and a delay transferring circuit connected between an input terminal and an output terminal of the amplifier, the delay transferring circuit configured to delay the input signal to transfer the delayed input signal to the output terminal of the amplifier.

Doherty power amplifier having reduced size. In some embodiments, a power amplification system can include a supply system configured to provide a high-voltage supply signal, and a Doherty power amplifier configured to receive the high-voltage supply signal and amplify a radio-frequency (RF) signal. The power amplification system can further include an output path configured to receive and route the amplified RF signal to a filter. The output path can be substantially free of an impedance transformation circuit.

Doherty power amplifier having reduced size. In some embodiments, a power amplification system can include a supply system configured to provide a high-voltage supply signal, and a Doherty power amplifier configured to receive the high-voltage supply signal and amplify a radio-frequency (RF) signal. The power amplification system can further include an output path configured to receive and route the amplified RF signal to a filter. The output path can be substantially free of an impedance transformation circuit.