H03F3/191

Negative impedance circuit

A negative impedance circuit including: a first and a second bipolar transistors having a common collector, a base of the first transistor being connected to an emitter of the second transistor; a third and a fourth bipolar transistors having a common collector, a base of the third transistor being connected with an emitter of the fourth transistor; and at least one first impedance formed of one or of a plurality of passive components coupling the common collector of the first and second transistors to the common collector of the third and fourth transistors, a base of the second transistor being coupled to the collector of the third and fourth transistors and a base of the fourth transistor being coupled to the collector of the first and second transistors.

METHODS FOR POWER AMPLIFICATION WITH SHARED COMMON BASE BIASING
20170317653 · 2017-11-02 ·

A power amplification system with shared common base biasing is disclosed. A method for power amplification at a controller of a power amplification system comprising a plurality of cascode amplifier sections can include receiving a band select signal indicative of one or more frequency bands of a radio-frequency input signal to be amplified and transmitted. The method may further include biasing a common base stage of each of the plurality of cascode amplifier sections, and biasing a common emitter stage of a subset of the plurality of cascode amplifier sections.

METHODS FOR POWER AMPLIFICATION WITH SHARED COMMON BASE BIASING
20170317653 · 2017-11-02 ·

A power amplification system with shared common base biasing is disclosed. A method for power amplification at a controller of a power amplification system comprising a plurality of cascode amplifier sections can include receiving a band select signal indicative of one or more frequency bands of a radio-frequency input signal to be amplified and transmitted. The method may further include biasing a common base stage of each of the plurality of cascode amplifier sections, and biasing a common emitter stage of a subset of the plurality of cascode amplifier sections.

Apparatus and methods for radio frequency amplifiers

Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.

Apparatus and methods for radio frequency amplifiers

Apparatus and methods for radio frequency (RF) amplifiers are disclosed herein. In certain implementations, a packaged RF amplifier includes a first bipolar transistor including a base electrically connected to an RF input pin and a collector electrically connected to an RF output pin, and a second bipolar transistor including a base electrically connected to an emitter of the first bipolar transistor and a collector electrically connected to the RF output pin. The packaged RF amplifier further includes a first bias circuit electrically connected between the base of the first bipolar transistor and the RF output pin, a second bias circuit electrically connected between the base of the first bipolar transistor and a power low pin, an inductor implemented at least partly by a bond wire, and a third bias circuit electrically connected in series with the inductor between the base of the second bipolar transistor and the power low pin.

Tuned semiconductor amplifier

Methods and structures for improving the performance of integrated semiconductor transistors operating at high frequency and/or high power are described. Two capacitors may be connected to an input of a semiconductor transistor and tuned to suppress second-harmonic generation and to transform and match the input impedance of the device. A two-stage tuning procedure is described. The transistor may comprise gallium nitride and may be configured as a power transistor capable of handling up to 1000 W of power. A tuned transistor may operate at frequencies up to 6 GHz with a peak drain efficiency greater than 60%.

POWER AMPLIFICATION SYSTEM WITH ADJUSTABLE COMMON BASE BIAS
20170302230 · 2017-10-19 ·

Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

POWER AMPLIFICATION SYSTEM WITH ADJUSTABLE COMMON BASE BIAS
20170302230 · 2017-10-19 ·

Power amplification system with adjustable common base bias. A power amplification system can include a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The power amplification system can further include a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

METHODS, MODULES AND DEVICES FOR DETECTING A SATURATION CONDITION OF A POWER AMPLIFIER
20170302231 · 2017-10-19 ·

The present disclosure relates to methods, modules and devices for detecting and preventing occurrence of a saturation state in a power amplifier. A method is disclosed for detecting a saturation condition of a power amplifier, including monitoring a first base current of a first transistor of a cascade transistor pair of the power amplifier and a second base current of a second transistor of the cascade transistor pair. The method can also include generating a current ratio based on comparing the first base current and the second base current. The method can further include determining if the current ratio exceeds or satisfies a threshold value and modifying one or more operating characteristics of the power amplifier in accordance with a determination that the current ratio exceeds or satisfies the threshold value.

METHODS, MODULES AND DEVICES FOR DETECTING A SATURATION CONDITION OF A POWER AMPLIFIER
20170302231 · 2017-10-19 ·

The present disclosure relates to methods, modules and devices for detecting and preventing occurrence of a saturation state in a power amplifier. A method is disclosed for detecting a saturation condition of a power amplifier, including monitoring a first base current of a first transistor of a cascade transistor pair of the power amplifier and a second base current of a second transistor of the cascade transistor pair. The method can also include generating a current ratio based on comparing the first base current and the second base current. The method can further include determining if the current ratio exceeds or satisfies a threshold value and modifying one or more operating characteristics of the power amplifier in accordance with a determination that the current ratio exceeds or satisfies the threshold value.