Methods related to power amplification systems with adjustable common base bias. A method of implementing a power amplification system can include providing a cascode amplifier coupled to a radio-frequency input signal and coupled to a radio-frequency output. The method can further include providing a biasing component configured to apply one or more biasing signals to the cascode amplifier, the biasing component including a bias controller and one or more bias components. Each respective bias component may be coupled to a respective bias transistor.

A radio frequency (RF) amplifier and a bias circuit are provided. The RF amplifier includes an amplifier, a first inductive-capacitive resonance circuit, and a first bias circuit. The amplifier includes an input terminal configured to receive an incoming RF signal through a first RF path. The first inductive-capacitive resonance circuit includes a first terminal coupled to a first reference voltage. A second terminal of the first inductive-capacitive resonance circuit is coupled to the first RF path. In response to the first reference voltage being at a first reference level, the RF amplifier is enabled; in response to the first reference voltage being at a second reference level, the RF amplifier is disabled. The first bias circuit includes a first terminal configured to be coupled to the first reference voltage and a second terminal coupled to the input terminal of the amplifier to provide a first direct current (DC) component.

Various envelope tracking amplifiers are presented that can be switched between an ET (envelope tracking) mode and a non-ET mode. Switches and/or tunable components are utilized in constructing the envelope tracking amplifiers that can be switched between the ET mode and the non-ET mode.

A circuit includes an electrical gain element, a variable reactance element, and a controller. The electrical gain element is arranged to receive and change an amplitude of a signal over a set frequency range. The variable reactance element is connected to the electrical gain element. The controller is configured to control the variable reactance element to have a reactance such that the electrical gain element has a set gain slope as a function of signal frequency over the set frequency range.

Aspects of this disclosure relate to compensating for dynamic error vector magnitude. A compensation circuit can generate a compensation signal based at least partly on an amount of time that an amplifier, such as a power amplifier, is turned off between successive transmission bursts of the amplifier. For example, the compensation circuit can charge a capacitor based at least partly on an amount of time that the amplifier is turned off between successive transmission bursts and generate the compensation signal based at least partly on an amount of charge stored on the capacitor. A bias circuit can receive the compensation signal, generate a bias signal based at least partly on the compensation signal, and provide the bias signal to the amplifier to bias the amplifier.

Aspects of this disclosure relate to compensating for dynamic error vector magnitude. A compensation circuit can generate a compensation signal based at least partly on an amount of time that an amplifier, such as a power amplifier, is turned off between successive transmission bursts of the amplifier. For example, the compensation circuit can charge a capacitor based at least partly on an amount of time that the amplifier is turned off between successive transmission bursts and generate the compensation signal based at least partly on an amount of charge stored on the capacitor. A bias circuit can receive the compensation signal, generate a bias signal based at least partly on the compensation signal, and provide the bias signal to the amplifier to bias the amplifier.

A power amplifier (PA) has been disclosed for linearity improvement. The PA comprises at least an amplifying transistor and at least an auxiliary transistor. Each amplifying transistor of the at least an amplifying transistor includes a first terminal for receiving an input signal of the PA, a second terminal for delivering an output signal of the PA, and a third terminal. Each auxiliary transistor of the at least an auxiliary transistor includes a first terminal, a second terminal coupled to the second terminal of the at least an amplifying transistor, and a third terminal electrically connected to the first terminal of the at least an amplifying transistor.

A power amplifier (PA) has been disclosed for linearity improvement. The PA comprises at least an amplifying transistor and at least an auxiliary transistor. Each amplifying transistor of the at least an amplifying transistor includes a first terminal for receiving an input signal of the PA, a second terminal for delivering an output signal of the PA, and a third terminal. Each auxiliary transistor of the at least an auxiliary transistor includes a first terminal, a second terminal coupled to the second terminal of the at least an amplifying transistor, and a third terminal electrically connected to the first terminal of the at least an amplifying transistor.

An apparatus includes a first conductive path comprising a first set of inductive elements connected in series, a second conductive path comprising a second set of inductive elements connected in series, each inductive element of the second set of inductive elements inductively coupled to, and having a mutual capacitance with, a corresponding inductive element of the first set of inductive elements. In some embodiments, the apparatus further includes a first amplifier having an amplifier input and an amplifier output, the amplifier output electrically connected to a proximal end of the first conductive path or the second conductive path. The described apparatus delays a signal according to the gain of the input amplifier. A method that uses the described apparatus is also disclosed herein.

Disclosed are devices and methods related to autotransformer-based impedance matching for radio-frequency (RF) applications. In some embodiments, an impedance matching device can include a primary metal trace and a secondary metal trace, each having a respective number of turns. Such metal traces can be interconnected to form an autotransformer with the primary metal trace and the secondary metal trace being in respective planes separated by a selected distance. Such an autotransformer can be utilized to, for example, facilitate impedance matching of an amplified RF signal from a power amplifier (PA). In some embodiments, the impedance matching device can be implemented as an integrated passive device (IPD) mountable on a packaging substrate. Such an IPD can be configured to allow stacking of another component on the IPD to yield a number of desirable features in products such as RF modules.