Disclosed are devices and methods related to autotransformer-based impedance matching for radio-frequency (RF) applications. In some embodiments, an impedance matching device can include a primary metal trace and a secondary metal trace, each having a respective number of turns. Such metal traces can be interconnected to form an autotransformer with the primary metal trace and the secondary metal trace being in respective planes separated by a selected distance. Such an autotransformer can be utilized to, for example, facilitate impedance matching of an amplified RF signal from a power amplifier (PA). In some embodiments, the impedance matching device can be implemented as an integrated passive device (IPD) mountable on a packaging substrate. Such an IPD can be configured to allow stacking of another component on the IPD to yield a number of desirable features in products such as RF modules.

The disclosure concerns a tunable logarithmic detector amplifier (TLDA) system where dynamic tuning functionality is applied to resonant circuits used for feedback control as well as applying tuning to the amplifier. Control signals for the tuning function are generated from the baseband processor. The control of the amplifier tuning and resonator tuning can be performed from information derived from baseband where metrics such as SNR, SINR or CQI are used to optimize system performance. Bandwidth and sensitivity of the receiver are key specifications targeted for optimization using this technique. This technique can be implemented in designs where a wide bandwidth is required.

The disclosure concerns a tunable logarithmic detector amplifier (TLDA) system where dynamic tuning functionality is applied to resonant circuits used for feedback control as well as applying tuning to the amplifier. Control signals for the tuning function are generated from the baseband processor. The control of the amplifier tuning and resonator tuning can be performed from information derived from baseband where metrics such as SNR, SINR or CQI are used to optimize system performance. Bandwidth and sensitivity of the receiver are key specifications targeted for optimization using this technique. This technique can be implemented in designs where a wide bandwidth is required.

Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.

Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.

Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.

Parallel capacitors (5c and 5d) of impedance matching circuits (5) which are connected to two transistors (1), respectively, have their first ends connected to a ground through via holes (5e and 5f) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors (1) for an LPF type impedance matching circuit (3), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (5), thereby being able to downsize the circuit.

Parallel capacitors (5c and 5d) of impedance matching circuits (5) which are connected to two transistors (1), respectively, have their first ends connected to a ground through via holes (5e and 5f) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors (1) for an LPF type impedance matching circuit (3), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (5), thereby being able to downsize the circuit.

A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.

A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.