Compression control through power amplifier voltage adjustment. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a power amplifier bias controller. The power amplifier bias controller can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to obtain a comparison value. The power amplifier module can include a saturation controller configured to supply a reference signal to a voltage converter based on the comparison value. The voltage converter can be configured to modify a supply voltage provided to the power amplifier based at least in part on the reference signal.

Provided is a current output circuit that includes: a first FET that has a power supply voltage supplied to a source thereof, that has a first voltage supplied to a gate thereof and that outputs a first current from a drain thereof; a second FET that has the power supply voltage supplied to a source thereof, that has the first voltage supplied to a gate thereof and that outputs an output current from a drain thereof; a first control circuit that controls the first voltage such that the first current comes to be at a target level; and a second control circuit that performs control such that a drain voltage of the first FET and a drain voltage of the second FET are made equal to each other.

A power amplification module includes: a first bipolar transistor in which a radio frequency signal is input to a base and an amplified signal is output from a collector; a second bipolar transistor that is thermally coupled with the first bipolar transistor and that imitates operation of the first bipolar transistor; a third bipolar transistor in which a first control voltage is supplied to a base and a first bias current is output from an emitter; a first resistor that generates a third control voltage corresponding to a collector current of the second bipolar transistor at a second terminal; and a fourth bipolar transistor in which a power supply voltage is supplied to a collector, the third control voltage is supplied to a base, and a second bias current is output from an emitter.

A low noise amplifier includes a T-type circuit, a first amplification module and a second amplification module. The T-type circuit is adapted to receive an input signal from a signal source, filters the input signal to generate a filtered signal, and is configured such that an equivalent input impedance seen into the T-type circuit matches an equivalent output impedance seen into the signal source. The first amplification module is coupled to the T-type circuit for receiving the filtered signal therefrom, and amplifies the filtered signal to generate an amplified signal. The second amplification module is coupled to the first amplification module for receiving the amplified signal therefrom, and amplifies the amplified signal to generate an output signal.

In one implementation, an amplifier comprises a load circuit comprising a plurality of inductor cells, and a drive circuit configured to receive an input signal, and to drive the load circuit based on the input signal to generate an amplified signal. The amplifier also comprises a controller configured to tune a peaking gain of the amplifier by adjusting a number of the inductor cells that are enabled.

A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.

A configuration is provided with: a tuned line 13 that is connected between a branch terminal 3 and a branch terminal of branch lines 2 and 4; and a tuned line 14 that is connected between a combining terminal 7 and a combining terminal 9 of combining lines 10 and 11. This enables reduction of a non-uniform voltage distribution occurring due to a difference in characteristics between two amplifier elements 6 and 8.

A configuration is provided with: a tuned line 13 that is connected between a branch terminal 3 and a branch terminal of branch lines 2 and 4; and a tuned line 14 that is connected between a combining terminal 7 and a combining terminal 9 of combining lines 10 and 11. This enables reduction of a non-uniform voltage distribution occurring due to a difference in characteristics between two amplifier elements 6 and 8.

An RF amplifier module that has a plurality of amplifiers wherein at least one of the amplifiers is powered via an envelope tracking module. The biasing input of at least one of the amplifiers is provided to the first amplifier to power the first amplifier to reduce power consumption. The first amplifier may also be powered via fixed biasing to provide greater stability of the module.

An RF amplifier module that has a plurality of amplifiers wherein at least one of the amplifiers is powered via an envelope tracking module. The biasing input of at least one of the amplifiers is provided to the first amplifier to power the first amplifier to reduce power consumption. The first amplifier may also be powered via fixed biasing to provide greater stability of the module.