An amplifier circuit amplifies a radio-frequency signal. The amplifier circuit includes an amplifier, an input matching circuit connected to an input side of the amplifier and matches impedance, and a protection circuit connected to a node in a path within a path between an input matching circuit and the amplifier. The protection circuit includes a first diode connected between the node and a ground, and a second diode connected in parallel with the first diode and connected in a direction opposite to the first diode between the node and the ground. A threshold voltage of each of the first diode and the second diode is greater than a maximum voltage amplitude of the input signal at the node and is less than a difference between a withstand voltage of the amplifier and the bias voltage.

An amplifier circuit (1) includes a FET (10) having a source terminal (S1), a drain terminal (D1), and a gate terminal (G1), a FET (20) having a source terminal (S2), a drain terminal (D2), and a gate terminal (G2) and coupled in parallel with the FET (10), a FET (30) having a source terminal (S3) coupled to the drain terminals (D1 and D2), a drain terminal (D3), and a gate terminal (G3) and cascoded with the FETs (10 and 20), and feedback circuits (21 and 22) configured to feed back to the gate terminal (G2) a high frequency signal outputted from the source terminal (S2) or the drain terminal (D2).

An amplifier circuit (1) includes a FET (10) having a source terminal (S1), a drain terminal (D1), and a gate terminal (G1), a FET (20) having a source terminal (S2), a drain terminal (D2), and a gate terminal (G2) and coupled in parallel with the FET (10), a FET (30) having a source terminal (S3) coupled to the drain terminals (D1 and D2), a drain terminal (D3), and a gate terminal (G3) and cascoded with the FETs (10 and 20), and feedback circuits (21 and 22) configured to feed back to the gate terminal (G2) a high frequency signal outputted from the source terminal (S2) or the drain terminal (D2).

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

An impedance control unit is disclosed. Also disclosed are a balun unit, an electronic device, and a Doherty amplifier, each comprising the impedance control unit. The impedance control unit comprises a pair of re-entrant type coupled lines, and further comprises an electrical short between the intermediate plane and the ground plane arranged locally inside the pair of coupled lines.

Embodiments disclosed herein describe a wireless power receiver including a synchronous rectifier using a Class-E or a Class-F amplifier. The voltage waveform generated from a power source, for example an antenna, is tapped to create a feed-forward tap-line to provide a gate voltage to the transistor of the Class-E or the Class-F amplifier. In some instances, a constant phase shift across the feed-forward tap-line may be provided using a micro-strip of a predetermined length that is selected such that the transistor switches at the zero-crossings of the voltage waveform arriving at the drain terminal of the transmitter. In other instances, a feed-forward circuit is used for controlling the phase across the feed-forward loop.

Embodiments disclosed herein describe a wireless power receiver including a synchronous rectifier using a Class-E or a Class-F amplifier. The voltage waveform generated from a power source, for example an antenna, is tapped to create a feed-forward tap-line to provide a gate voltage to the transistor of the Class-E or the Class-F amplifier. In some instances, a constant phase shift across the feed-forward tap-line may be provided using a micro-strip of a predetermined length that is selected such that the transistor switches at the zero-crossings of the voltage waveform arriving at the drain terminal of the transmitter. In other instances, a feed-forward circuit is used for controlling the phase across the feed-forward loop.

A radio frequency transmitter includes a digital-to-analog converter, a passive network, two buffers, a frequency mixer, and a power amplifier. Two output ends of the digital-to-analog converter are respectively coupled to two input nodes of the passive network, and the two output ends of the digital-to-analog converter are respectively coupled to input ends of the two buffers. Output ends of the two buffers are respectively coupled to two input ends of the frequency mixer. An output end of the frequency mixer is coupled to an input end of the power amplifier. An output end of the power amplifier is coupled to an antenna. The passive network is configured to perform filtering processing on an input current signal, and convert the current signal into a voltage signal.

The disclosed technology is related to a radio-frequency (RF) amplifier having a bypass circuit and a resonant structure to improve performance in a bypass mode (e.g., a low gain mode). The disclosed amplifiers have a resonant structure that effectively isolates an amplifier core from a bypass circuit. For example, in a bypass mode, the resonant structure is configured to create an open impedance looking into the amplifier core input. This effectively removes any loading from the amplifier core to the bypass circuit. The disclosed amplifiers with resonant structures improve linearity performance in bypass modes due at least in part to the open impedance to the amplifier core provided by the resonant structure.