H03F3/193

Clamp logic circuit

A clamp logic circuit has a logic circuit, a control terminal, a current clamp circuit and an output terminal. The logic circuit has at least a junction field-effect transistor (JFET). The control terminal receives an input signal. The current clamp circuit has a transistor and a resistor. A first end of the transistor is coupled to the control terminal, a second end of the transistor is coupled to a first end of the resistor, a control end of the transistor is coupled to a reference voltage, and a second end of the resistor is coupled to an input end of the logic circuit. The output terminal is coupled to an output end of the logic circuit.

Power amplification apparatus and television signal transmission system
10873298 · 2020-12-22 · ·

An amplification unit contains two or more sets containing a plurality of amplification circuits, and amplifies power of an RF (Radio Frequency) signal. A combining unit contains two or more combiners corresponding to the two or more sets, combines RF signals output by the amplification circuits, and outputs a resultant RF signal. The amplification unit and the combining unit have two or more connectors which are arranged transversely. The amplification unit and the combining unit are attachable/detachable.

Power amplification apparatus and television signal transmission system
10873298 · 2020-12-22 · ·

An amplification unit contains two or more sets containing a plurality of amplification circuits, and amplifies power of an RF (Radio Frequency) signal. A combining unit contains two or more combiners corresponding to the two or more sets, combines RF signals output by the amplification circuits, and outputs a resultant RF signal. The amplification unit and the combining unit have two or more connectors which are arranged transversely. The amplification unit and the combining unit are attachable/detachable.

SIGNAL PROCESSING DEVICE, AMPLIFIER, AND METHOD
20200395974 · 2020-12-17 ·

An active electronic device that enables bidirectional communication over a single antenna or path is disclosed. The device may be characterized by a forward path (from an input to an antenna port) offering high gain, and a reverse path (to a receiver port) that can be configured as an finite impulse response (FIR) filter. An amplifier of the device is disclosed, the amplifier allowing for tuning of output resistance using passive mixers.

SIGNAL PROCESSING DEVICE, AMPLIFIER, AND METHOD
20200395974 · 2020-12-17 ·

An active electronic device that enables bidirectional communication over a single antenna or path is disclosed. The device may be characterized by a forward path (from an input to an antenna port) offering high gain, and a reverse path (to a receiver port) that can be configured as an finite impulse response (FIR) filter. An amplifier of the device is disclosed, the amplifier allowing for tuning of output resistance using passive mixers.

COUPLING A BIAS CIRCUIT TO AN AMPLIFIER USING AN ADAPTIVE COUPLING ARRANGEMENT

Bias networks for amplifiers are disclosed. An example bias network includes an adaptive bias circuit, configured to generate a bias signal for an amplifier, and further includes a coupling circuit, configured to couple the adaptive bias circuit to the amplifier. The coupling circuit is made adaptive in that its' impedance depends on a power level of an input signal to be amplified by the amplifier. By configuring the coupling circuit to have a variable impedance that depends on the power level of the input signal, the coupling circuit may adapt to the input power level and, thereby, may modify the bias signal to reduce/optimize at least some of the nonlinearity that may be introduced to the bias signal by the adaptive bias circuit.

WLAN front-end

In some embodiments, a wireless local area network (WLAN) front-end can be implemented on a semiconductor die having a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for WLAN transmit operation associated with a frequency range. The semiconductor die can further include a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die can further include a transmit/receive switch implemented on the semiconductor substrate and configured to support the transmit and receive operations.

WLAN front-end

In some embodiments, a wireless local area network (WLAN) front-end can be implemented on a semiconductor die having a semiconductor substrate, and a power amplifier implemented on the semiconductor substrate and configured for WLAN transmit operation associated with a frequency range. The semiconductor die can further include a low-noise amplifier (LNA) implemented on the semiconductor substrate and configured for WLAN receive operation associated with the frequency range. The semiconductor die can further include a transmit/receive switch implemented on the semiconductor substrate and configured to support the transmit and receive operations.

Wireless receiver and wireless reception method

A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.

Wireless receiver and wireless reception method

A wireless receiver and a wireless reception method provide: to determine a gain based on a first resistor having a first temperature characteristic and a second resistor having a second temperature characteristic different from the first resistance; to output an output of the first resistor and an output of the second resistor, or a ratio between the output of the first resistor and the output of the second resistor; and to switches the gain of the first circuit based on the outputs or the ratio between the outputs.